VMOV (register) Copy between FP registers Copy between FP registers copies the contents of one FP register to another. Depending on settings in the CPACR, NSACR, HCPTR, and FPEXC registers, and the Security state and PE mode in which the instruction is executed, an attempt to execute the instruction might be UNDEFINED, or trapped to Hyp mode. For more information see Enabling Advanced SIMD and floating-point support. This instruction is a data-independent-time instruction as described in About the DIT bit. It has encodings from the following instruction sets: A32 ( A2 ) and T32 ( T2 ) . != 1111 1 1 1 0 1 1 1 0 0 0 0 1 0 1 x 0 1 0 0 VMOV{<c>}{<q>}.F32 <Sd>, <Sm> 1 VMOV{<c>}{<q>}.F64 <Dd>, <Dm> if FPSCR().Len != '000' || FPSCR().Stride != '00' then Undefined(); end; let d : integer = if size == '11' then UInt(D::Vd) else UInt(Vd::D); let m : integer = if size == '11' then UInt(M::Vm) else UInt(Vm::M); let single_register : boolean = (size == '10'); let advsimd : boolean = FALSE; 1 1 1 0 1 1 1 0 1 1 1 0 0 0 0 1 0 1 x 0 1 0 0 VMOV{<c>}{<q>}.F32 <Sd>, <Sm> 1 VMOV{<c>}{<q>}.F64 <Dd>, <Dm> if FPSCR().Len != '000' || FPSCR().Stride != '00' then Undefined(); end; let d : integer = if size == '11' then UInt(D::Vd) else UInt(Vd::D); let m : integer = if size == '11' then UInt(M::Vm) else UInt(Vm::M); let single_register : boolean = (size == '10'); let advsimd : boolean = FALSE; <c> See Standard assembler syntax fields. <q> See Standard assembler syntax fields. <Sd> Is the 32-bit name of the SIMD&FP destination register, encoded in the "Vd:D" field. <Sm> Is the 32-bit name of the SIMD&FP source register, encoded in the "Vm:M" field. <Dd> Is the 64-bit name of the SIMD&FP destination register, encoded in the "D:Vd" field. <Dm> Is the 64-bit name of the SIMD&FP source register, encoded in the "M:Vm" field. if ConditionPassed() then EncodingSpecificOperations(); CheckAdvSIMDOrVFPEnabled(TRUE, advsimd); if single_register then S(d) = S(m); else D(d) = D(m); end; end; 2026-03-26 20:27:25 2026-03_rel