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CPS, CPSID, CPSIE -- AArch32

CPS, CPSID, CPSIE

Change PE State changes one or more of the PSTATE.{A, I, F} interrupt mask bits and, optionally, the PSTATE.M mode field, without changing any other PSTATE bits.

CPS is treated as NOP if executed in User mode unless it is defined as being CONSTRAINED UNPREDICTABLE elsewhere in this section.

The PE checks whether the value being written to PSTATE.M is legal. See Illegal changes to PSTATE.M.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 and T2 ) .

A1

313029282726252423222120191817161514131211109876543210
111100010000imodM0(0)(0)(0)(0)(0)(0)(0)AIF0mode
opE

Encoding for the Change mode variant

Applies when (imod == 00 && M == 1)

CPS{<q>} #<mode> // (Cannot be conditional)

Encoding for the Interrupt disable variant

Applies when (imod == 11 && M == 0)

CPSID{<q>} <iflags> // (Cannot be conditional)

Encoding for the Interrupt disable and change mode variant

Applies when (imod == 11 && M == 1)

CPSID{<q>} <iflags> , #<mode> // (Cannot be conditional)

Encoding for the Interrupt enable variant

Applies when (imod == 10 && M == 0)

CPSIE{<q>} <iflags> // (Cannot be conditional)

Encoding for the Interrupt enable and change mode variant

Applies when (imod == 10 && M == 1)

CPSIE{<q>} <iflags> , #<mode> // (Cannot be conditional)

Decode for all variants of this encoding

if mode != '00000' && M == '0' then UnpredictableProcedure(); end; if (imod[1] == '1' && A::I::F == '000') || (imod[1] == '0' && A::I::F != '000') then UnpredictableProcedure(); end; let enable : boolean = (imod == '10'); let disable : boolean = (imod == '11'); let changemode : boolean = (M == '1'); let pemode : bits(5) = mode; let affectA : boolean = (A == '1'); let affectI : boolean = (I == '1'); let affectF : boolean = (F == '1'); if (imod == '00' && M == '0') || imod == '01' then UnpredictableProcedure(); end;

CONSTRAINED UNPREDICTABLE behavior

If imod == '01', then one of the following behaviors must occur:

If imod == '00' && M == '0', then one of the following behaviors must occur:

If mode != '00000' && M == '0', then one of the following behaviors must occur:

If imod<1> == '1' && A:I:F == '000', then one of the following behaviors must occur:

If imod<1> == '0' && A:I:F != '000', then one of the following behaviors must occur:

T1

1514131211109876543210
10110110011im(0)AIF
op

Encoding for the Interrupt disable variant

Applies when (im == 1)

CPSID{<q>} <iflags> // (Not permitted in IT block)

Encoding for the Interrupt enable variant

Applies when (im == 0)

CPSIE{<q>} <iflags> // (Not permitted in IT block)

Decode for all variants of this encoding

if A::I::F == '000' then UnpredictableProcedure(); end; let enable : boolean = (im == '0'); let disable : boolean = (im == '1'); let changemode : boolean = FALSE; let affectA : boolean = (A == '1'); let affectI : boolean = (I == '1'); let affectF : boolean = (F == '1'); let pemode : bits(5) = ARBITRARY : bits(5); if InITBlock() then UnpredictableProcedure(); end;

CONSTRAINED UNPREDICTABLE behavior

If A:I:F == '000', then one of the following behaviors must occur:

T2

15141312111098765432101514131211109876543210
111100111010(1)(1)(1)(1)10(0)0(0)imodMAIFmode

Encoding for the Change mode variant

Applies when (imod == 00 && M == 1)

CPS{<q>} #<mode> // (Not permitted in IT block)

Encoding for the Interrupt disable variant

Applies when (imod == 11 && M == 0)

CPSID.W <iflags> // (Not permitted in IT block)

Encoding for the Interrupt disable and change mode variant

Applies when (imod == 11 && M == 1)

CPSID{<q>} <iflags>, #<mode> // (Not permitted in IT block)

Encoding for the Interrupt enable variant

Applies when (imod == 10 && M == 0)

CPSIE.W <iflags> // (Not permitted in IT block)

Encoding for the Interrupt enable and change mode variant

Applies when (imod == 10 && M == 1)

CPSIE{<q>} <iflags>, #<mode> // (Not permitted in IT block)

Decode for all variants of this encoding

if imod == '00' && M == '0' then See("Hint instructions"); end; if mode != '00000' && M == '0' then UnpredictableProcedure(); end; if (imod[1] == '1' && A::I::F == '000') || (imod[1] == '0' && A::I::F != '000') then UnpredictableProcedure(); end; let enable : boolean = (imod == '10'); let disable : boolean = (imod == '11'); let changemode : boolean = (M == '1'); let pemode : bits(5) = mode; let affectA : boolean = (A == '1'); let affectI : boolean = (I == '1'); let affectF : boolean = (F == '1'); if imod == '01' || InITBlock() then UnpredictableProcedure(); end;

CONSTRAINED UNPREDICTABLE behavior

If imod == '01', then one of the following behaviors must occur:

If mode != '00000' && M == '0', then one of the following behaviors must occur:

If imod<1> == '1' && A:I:F == '000', then one of the following behaviors must occur:

If imod<1> == '0' && A:I:F != '000', then one of the following behaviors must occur:

Hint instructions: In encoding T2, if the imod field is 0b00 and the M bit is 0b0, a hint instruction is encoded. To determine which hint instruction, see Branches and miscellaneous control.

For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<q>

See Standard assembler syntax fields.

<mode>

Is the number of the mode to change to, in the range 0 to 31, encoded in the "mode" field.

<iflags>

Is a sequence of one or more of the following, specifying which interrupt mask bits are affected:

a
Sets the A bit in the instruction, causing the specified effect on PSTATE.A, the SError interrupt mask bit.
i
Sets the I bit in the instruction, causing the specified effect on PSTATE.I, the IRQ interrupt mask bit.
f
Sets the F bit in the instruction, causing the specified effect on PSTATE.F, the FIQ interrupt mask bit.

Operation

if CurrentInstrSet() == InstrSet_A32 then EncodingSpecificOperations(); if PSTATE.EL != EL0 then if enable then if affectA then PSTATE.A = '0'; end; if affectI then PSTATE.I = '0'; end; if affectF then PSTATE.F = '0'; end; end; if disable then if affectA then PSTATE.A = '1'; end; if affectI then PSTATE.I = '1'; end; if affectF then PSTATE.F = '1'; end; end; if changemode then // AArch32_WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change. AArch32_WriteModeByInstr(pemode); end; end; else EncodingSpecificOperations(); if PSTATE.EL != EL0 then if enable then if affectA then PSTATE.A = '0'; end; if affectI then PSTATE.I = '0'; end; if affectF then PSTATE.F = '0'; end; end; if disable then if affectA then PSTATE.A = '1'; end; if affectI then PSTATE.I = '1'; end; if affectF then PSTATE.F = '1'; end; end; if changemode then // AArch32_WriteModeByInstr() sets PSTATE.IL to 1 if this is an illegal mode change. AArch32_WriteModeByInstr(pemode); end; end; end;


2026-03_rel 2026-03-26 20:48:11

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