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HLT -- AArch32

HLT

Halting breakpoint causes a software breakpoint to occur.

Halting breakpoint is always unconditional, even inside an IT block.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

313029282726252423222120191817161514131211109876543210
!= 111100010000imm120111imm4
condopc

Encoding

HLT{<q>} {#}<imm>

Decode for this encoding

if EDSCR().HDE == '0' || !HaltingAllowed() then Undefined(); end; if cond != '1110' then UnpredictableProcedure(); end; // HLT must be encoded with AL condition

CONSTRAINED UNPREDICTABLE behavior

If cond != '1110', then one of the following behaviors must occur:

T1

1514131211109876543210
1011101010imm6

Encoding

HLT{<q>} {#}<imm>

Decode for this encoding

if EDSCR().HDE == '0' || !HaltingAllowed() then Undefined(); end;

For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<q>

See Standard assembler syntax fields. An HLT instruction must be unconditional.

<imm>

For the "A1" variant: is a 16-bit unsigned immediate, in the range 0 to 65535, encoded in the "imm12:imm4" field. This value is for assembly and disassembly only. It is ignored by the PE, but can be used by a debugger to store more information about the halting breakpoint.

For the "T1" variant: is a 6-bit unsigned immediate, in the range 0 to 63, encoded in the "imm6" field. This value is for assembly and disassembly only. It is ignored by the PE, but can be used by a debugger to store more information about the halting breakpoint.

Operation

EncodingSpecificOperations(); let is_async : boolean = FALSE; let fault : FaultRecord = NoFault(); Halt(DebugHalt_HaltInstruction, is_async, fault);


2026-03_rel 2026-03-26 20:48:11

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