MLA, MLAS -- AArch32

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MLA, MLAS

Multiply Accumulate multiplies two register values, and adds a third register value. The least significant 32 bits of the result are written to the destination register. These 32 bits do not depend on whether the source register values are considered to be signed values or unsigned values.

In an A32 instruction, the condition flags can optionally be updated based on the result. Use of this option adversely affects performance on many implementations.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
!= 1111				0	0	0	0	0	0	1	S	Rd				Ra				Rm				1	0	0	1	Rn
cond								opc

Encoding for the Flag setting variant

Applies when (S == 1)

MLAS{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra>

Encoding for the Not flag setting variant

Applies when (S == 0)

MLA{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra>

Decode for all variants of this encoding

let d : integer = UInt(Rd); let n : integer = UInt(Rn); let m : integer = UInt(Rm); let a : integer = UInt(Ra); let setflags : boolean = (S == '1'); if d == 15 || n == 15 || m == 15 || a == 15 then UnpredictableProcedure(); end;

T1

15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	1	1	0	1	1	0	0	0	0	Rn				!= 1111				Rd				0	0	0	0	Rm
									op1							Ra										op2

Encoding

MLA{<c>}{<q>} <Rd>, <Rn>, <Rm>, <Ra>

Decode for this encoding

if Ra == '1111' then See("MUL"); end; let d : integer = UInt(Rd); let n : integer = UInt(Rn); let m : integer = UInt(Rm); let a : integer = UInt(Ra); let setflags : boolean = FALSE; // Armv8-A removes UNPREDICTABLE for R13 if d == 15 || n == 15 || m == 15 then UnpredictableProcedure(); end;

For more information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.

Assembler Symbols

<c>	See Standard assembler syntax fields.

<q>	See Standard assembler syntax fields.

<Rd>	Is the general-purpose destination register, encoded in the "Rd" field.

<Rn>	Is the first general-purpose source register holding the multiplicand, encoded in the "Rn" field.

<Rm>	Is the second general-purpose source register holding the multiplier, encoded in the "Rm" field.

<Ra>	Is the third general-purpose source register holding the addend, encoded in the "Ra" field.

Operation

if ConditionPassed() then EncodingSpecificOperations(); let operand1 : integer = SInt(R(n)); // operand1 = UInt(R[n]) produces the same final results let operand2 : integer = SInt(R(m)); // operand2 = UInt(R[m]) produces the same final results let addend : integer = SInt(R(a)); // addend = UInt(R[a]) produces the same final results let result : integer = operand1 * operand2 + addend; R(d) = result[31:0]; if setflags then PSTATE.N = result[31]; PSTATE.Z = IsZeroBit{32}(result[31:0]); // PSTATE.C, PSTATE.V unchanged end; end;

Operational information

This instruction is a data-independent-time instruction as described in About the DIT bit.

2026-03_rel 2026-03-26 20:48:11