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SMLALBB, SMLALBT, SMLALTB, SMLALTT

Signed Multiply Accumulate Long (halfwords) multiplies two signed 16-bit values to produce a 32-bit value, and accumulates this with a 64-bit value. The multiply acts on two signed 16-bit quantities, taken from either the bottom or the top half of their respective source registers. The other halves of these source registers are ignored. The 32-bit product is sign-extended and accumulated with a 64-bit accumulate value.

Overflow is possible during this instruction, but only as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo 2⁶⁴.

It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .

A1

Decode for all variants of this encoding

let dLo : integer = UInt(RdLo); let dHi : integer = UInt(RdHi); let n : integer = UInt(Rn); let m : integer = UInt(Rm); let n_index : integer = UInt(N); let m_index : integer = UInt(M); if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UnpredictableProcedure(); end; if dHi == dLo then UnpredictableProcedure(); end;

CONSTRAINED UNPREDICTABLE behavior

If dHi == dLo, then one of the following behaviors must occur:

• The instruction is undefined.
• The instruction executes as NOP.
• The value in the destination register is unknown.

T1

Decode for all variants of this encoding

let dLo : integer = UInt(RdLo); let dHi : integer = UInt(RdHi); let n : integer = UInt(Rn); let m : integer = UInt(Rm); let n_index : integer = UInt(N); let m_index : integer = UInt(M); if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UnpredictableProcedure(); end; // Armv8-A removes UNPREDICTABLE for R13 if dHi == dLo then UnpredictableProcedure(); end;

CONSTRAINED UNPREDICTABLE behavior

If dHi == dLo, then one of the following behaviors must occur:

• The instruction is undefined.
• The instruction executes as NOP.
• The value in the destination register is unknown.

Assembler Symbols