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EDITCTRL

EDITCTRL, External Debug Integration mode Control register

The EDITCTRL characteristics are:

Purpose

Enables the external debug to switch from its default mode into integration mode, where test software can control directly the inputs and outputs of the PE, for integration testing or topology detection.

Configuration

The power domain of EDITCTRL is IMPLEMENTATION DEFINED.

Implementation of this register is OPTIONAL.

Attributes

EDITCTRL is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0IME

Bits [31:1]

Reserved, RES0.

IME, bit [0]

Integration mode enable. When IME == 1, the device reverts to an integration mode to enable integration testing or topology detection.

IMEMeaning
0b0

Normal operation.

0b1

Integration mode enabled.

The integration mode behavior is IMPLEMENTATION DEFINED.

The following resets apply:

Accessing EDITCTRL

EDITCTRL can be accessed through the external debug interface:

ComponentOffsetInstance
Debug0xF00EDITCTRL

Accessible as follows:


2026-03-12 12:23:09, 2025-09_rel_asl1

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