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TRBDEVID1, Device Configuration Register 1

The TRBDEVID1 characteristics are:

Purpose

Provides discovery information for the component.

For additional information, see the CoreSight Architecture Specification.

Configuration

TRBDEVID1 is in the Core power domain.

This register is present only when FEAT_TRBE_EXT is implemented. Otherwise, direct accesses to TRBDEVID1 are RES0.

Attributes

TRBDEVID1 is a 32-bit register.

Field descriptions

Bits [31:24]

PMG_MAX, bits [23:16]
When FEAT_TRBE_MPAM is implemented:

Otherwise:

PARTID_MAX, bits [15:0]
When FEAT_TRBE_MPAM is implemented:

Otherwise:

Accessing TRBDEVID1

TRBDEVID1 can be accessed through the external debug interface:

Accessible as follows:

• When DoubleLockStatus() or !IsCorePowered(), accesses to this register generate an error response.
• Otherwise, accesses to this register are RO.

2026-03-12 12:23:09, 2025-09_rel_asl1

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