CNTPCT Counter-timer Physical Count register when FEAT_AA32 is implemented CNTPCT_EL0 Architectural AArch64 63 0 63 0 63 0 63 0 Holds the 64-bit physical count value. Timer All reads to the CNTPCT occur in program order relative to reads to CNTPCTSS or CNTPCT. CNTPCT is a 64-bit register. PhysicalCount Physical count value 63 0 63:0 Physical count value. AU MRRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <Rt2>, <CRm> if !IsFeatureImplemented(FEAT_AA32) then Undefined(); elsif PSTATE.EL == EL0 then if IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL1) && !ELIsInHost(EL0) && CNTKCTL_EL1().EL0PCTEN == '0' then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); else AArch64_AArch32SystemAccessTrap(EL1, 0x04); end; elsif IsFeatureImplemented(FEAT_AA32EL1) && ELUsingAArch32(EL1) && CNTKCTL().PL0PCTEN == '0' then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2)) && HCR().TGE == '1' then AArch32_TakeHypTrapException(0x00); else Undefined(); end; elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && !ELIsInHost(EL2) && CNTHCTL_EL2().EL1PCTEN == '0' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); elsif ELIsInHost(EL2) && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '0' && CNTHCTL_EL2().EL1PCTEN == '0' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); elsif ELIsInHost(EL0) && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && CNTHCTL_EL2().EL0PCTEN == '0' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2)) && CNTHCTL().PL1PCTEN == '0' then AArch32_TakeHypTrapException(0x04); else if IsFeatureImplemented(FEAT_ECV_POFF) && EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && (!HaveEL(EL3) || SCR_EL3().ECVEn == '1') && CNTHCTL_EL2().ECV == '1' && !ELIsInHost(EL0) then R(t, t2) = PhysicalCountInt() - CNTPOFF_EL2(); else R(t, t2) = PhysicalCountInt(); end; end; elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && CNTHCTL_EL2().EL1PCTEN == '0' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && CNTHCTL().PL1PCTEN == '0' then AArch32_TakeHypTrapException(0x04); else if IsFeatureImplemented(FEAT_ECV_POFF) && EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && (!HaveEL(EL3) || SCR_EL3().ECVEn == '1') && CNTHCTL_EL2().ECV == '1' then R(t, t2) = PhysicalCountInt() - CNTPOFF_EL2(); else R(t, t2) = PhysicalCountInt(); end; end; elsif PSTATE.EL == EL2 then R(t, t2) = PhysicalCountInt(); elsif PSTATE.EL == EL3 then R(t, t2) = PhysicalCountInt(); end; 2026-03-26 20:27:25 2026-03_rel