DBGDEVID1 Debug Device ID register 1 when FEAT_AA32EL1 is implemented Adds to the information given by the DBGDIDR by describing other features of the debug implementation. Identification Registers This register is required in all implementations. DBGDEVID1 is a 32-bit register. 31 4 31:4 Reserved, RES0. PCSROffset 3 0 3:0 This field indicates the offset applied to PC samples returned by reads of EDPCSR. When FEAT_PCSRv8p2 is implemented, the only permitted value is 0b0000. FEAT_PCSRv8p2 implements the PC Sample-based Profiling Extension in the Performance Monitors register space, as indicated by the value of PMDEVID.PCSample. 0b0000 EDPCSR is not implemented. 0b0010 EDPCSR implemented. Samples have no offset applied and do not sample the instruction set state in AArch32 state. RO MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !IsFeatureImplemented(FEAT_AA32EL1) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TDA == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && MDCR_EL2().[TDE,TDA] != '00' then AArch64_AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HDCR().[TDE,TDA] != '00' then AArch32_TakeHypTrapException(0x05); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x05); end; else R(t) = DBGDEVID1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TDA == '1' then Undefined(); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x05); end; else R(t) = DBGDEVID1(); end; elsif PSTATE.EL == EL3 then R(t) = DBGDEVID1(); end; 2026-03-26 20:27:25 2026-03_rel