DSPSR2 Debug Saved Process State Register 2 when FEAT_Debugv8p9 is implemented and FEAT_AA32 is implemented DSPSR_EL0 Architectural AArch64 31 0 63 32 31 0 63 32 when FEAT_Debugv8p9 is implemented Holds the saved process state for Debug state. On entering Debug state, PSTATE information is written to this register. On exiting Debug state, values are copied from this register to PSTATE. Unknown DSPSR2 is a 32-bit register. 31 5 31:5 Reserved, RES0. UINJ 4 4 0 Inject Undefined Instruction exception. Set to the value of PSTATE.UINJ on entering Debug state, and copied to PSTATE.UINJ on exiting Debug state. AU When FEAT_UINJ is implemented 4 4 4 Reserved, RES0. Otherwise 3 0 3:0 Reserved, RES0. MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !(IsFeatureImplemented(FEAT_Debugv8p9) && IsFeatureImplemented(FEAT_AA32)) then Undefined(); elsif !Halted() then Undefined(); else R(t) = DSPSR2(); end; MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !(IsFeatureImplemented(FEAT_Debugv8p9) && IsFeatureImplemented(FEAT_AA32)) then Undefined(); elsif !Halted() then Undefined(); else DSPSR2() = R(t); end; 2026-03-26 20:27:25 2026-03_rel