HSTR Hyp System Trap Register when FEAT_AA32EL2 is implemented EL2 EL3 HSTR_EL2 Architectural AArch64 31 0 31 0 31 0 31 0 Controls trapping to Hyp mode of Non-secure accesses, at EL1 or lower, to System registers in the coproc == 0b1111 encoding space: By the CRn value used to access the register using MCR or MRC instruction. By the CRm value used to access the register using MCRR or MRRC instruction. Virt If EL2 is not implemented, this register is RES0 from EL3. HSTR is a 32-bit register. 31 16 31:16, 14, 4 Reserved, RES0. 31 16 14 14 4 4 T<n> 15 15 15, 13:5, 3:0 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. 15 15 13 5 3 0 15 15 13 5 3 0 T<n> 0b0 This control has no effect on Non-secure EL0 or EL1 accesses to System registers. 0b1 Any Non-secure EL1 MCR or MRC access with coproc == 0b1111 and CRn == <n> is trapped to Hyp mode. A Non-secure EL0 MCR or MRC access with these values is trapped to Hyp mode only if the access is not UNDEFINED when the value of this field is 0. Any Non-secure EL1 MCRR or MRRC access with coproc == 0b1111 and CRm == <n> is trapped to Hyp mode. A Non-secure EL0 MCRR or MRRC access with these values is trapped to Hyp mode only if the access is not UNDEFINED when the value of this field is 0. 0x0000 AU T15 15 15 13 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. 14 14 31:16, 14, 4 Reserved, RES0. T13 13 13 13 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T12 12 12 12 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T11 11 11 11 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T10 10 10 10 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T9 9 9 9 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T8 8 8 8 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T7 7 7 7 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T6 6 6 6 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T5 5 5 5 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. 4 4 31:16, 14, 4 Reserved, RES0. T3 3 3 3 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T2 2 2 2 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T1 1 1 1 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. T0 0 0 0 The remaining fields control whether Non-secure EL0 and EL1 accesses, using MCR or MRC instructions, reported using EC syndrome value 0x03, and MCRR or MRRC instructions, reported using EC syndrome value 0x04, to the System registers in the coproc == 0b1111 encoding space are trapped to Hyp mode: For example, when HSTR.T7 is 1, for instructions executed at Non-secure EL1: An MCR or MRC instruction with coproc set to 0b1111 and <CRn> set to c7 is trapped to Hyp mode. An MCRR or MRRC instruction with coproc set to 0b1111 and <CRm> set to c7 is trapped to Hyp mode. MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !IsFeatureImplemented(FEAT_AA32EL2) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T1 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T1 == '1' then AArch32_TakeHypTrapException(0x03); else Undefined(); end; elsif PSTATE.EL == EL2 then R(t) = HSTR(); elsif PSTATE.EL == EL3 then if SCR().NS == '0' then Undefined(); else R(t) = HSTR(); end; end; MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !IsFeatureImplemented(FEAT_AA32EL2) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T1 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T1 == '1' then AArch32_TakeHypTrapException(0x03); else Undefined(); end; elsif PSTATE.EL == EL2 then HSTR() = R(t); elsif PSTATE.EL == EL3 then if SCR().NS == '0' then Undefined(); else HSTR() = R(t); end; end; 2026-03-26 20:27:25 2026-03_rel