ID_AFR0 Auxiliary Feature Register 0 when FEAT_AA32EL1 is implemented ID_AFR0_EL1 Architectural AArch64 31 0 31 0 31 0 31 0 Provides information about the IMPLEMENTATION DEFINED features of the PE in AArch32 state. Must be interpreted with the Main ID Register, MIDR. For general information about the interpretation of the ID registers see 'Principles of the ID scheme for fields in ID registers'. Identification Registers ID_AFR0 is a 32-bit register. 31 16 31:16 Reserved, RES0. IMPLEMENTATION DEFINED 15 12 15:12 IMPLEMENTATION DEFINED. IMPLEMENTATION DEFINED 11 8 11:8 IMPLEMENTATION DEFINED. IMPLEMENTATION DEFINED 7 4 7:4 IMPLEMENTATION DEFINED. IMPLEMENTATION DEFINED 3 0 3:0 IMPLEMENTATION DEFINED. MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !IsFeatureImplemented(FEAT_AA32EL1) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T0 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T0 == '1' then AArch32_TakeHypTrapException(0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HCR_EL2().TID3 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HCR().TID3 == '1' then AArch32_TakeHypTrapException(0x03); else R(t) = ID_AFR0(); end; elsif PSTATE.EL == EL2 then R(t) = ID_AFR0(); elsif PSTATE.EL == EL3 then R(t) = ID_AFR0(); end; 2026-03-26 20:27:25 2026-03_rel