PMCCFILTR Performance Monitors Cycle Count Filter Register when FEAT_AA32 is implemented and FEAT_PMUv3 is implemented PMCCFILTR_EL0 Architectural AArch64 31 0 31 0 31 0 31 0 PMCCFILTR_EL0 Architectural External 31 0 31 0 31 0 31 0 Determines the modes in which the Cycle Counter, PMCCNTR, increments. PMU PMCCFILTR is a 32-bit register. P 31 31 31 Privileged filtering. Controls counting cycles in EL1 and, if EL3 is using AArch32, EL3. If Secure and Non-secure states are implemented, then counting cycles in Non-secure EL1 is further controlled by PMCCFILTR.NSK. 0b0 This mechanism has no effect on filtering of cycles. 0b1 The PE does not count cycles in EL1 and, if EL3 is using AArch32, EL3. AU '0' AU U 30 30 30 User filtering. Controls counting cycles in EL0. If Secure and Non-secure states are implemented, then counting cycles in Non-secure EL0 is further controlled by PMCCFILTR.NSU. If FEAT_RME is implemented, then counting cycles in Realm EL0 is further controlled by PMCCFILTR.RLU. 0b0 This mechanism has no effect on filtering of cycles. 0b1 The PE does not count cycles in EL0. AU '0' AU NSK 29 29 0 Non-secure EL1 filtering. Controls counting cycles in Non-secure EL1. If PMCCFILTR.NSK is not equal to PMCCFILTR.P, then the PE does not count cycles in Non-secure EL1. Otherwise, this mechanism has no effect on filtering of cycles in Non-secure EL1. 0b0 When PMCCFILTR.P == 0, this mechanism has no effect on filtering of cycles. When PMCCFILTR.P == 1, the PE does not count cycles in Non-secure EL1. 0b1 When PMCCFILTR.P == 0, the PE does not count cycles in Non-secure EL1. When PMCCFILTR.P == 1, this mechanism has no effect on filtering of cycles. AU '0' AU When EL3 is implemented 29 29 29 Reserved, RES0. Otherwise NSU 28 28 0 Non-secure EL0 filtering. Controls counting cycles in Non-secure EL0. If PMCCFILTR.NSU is not equal to PMCCFILTR.U, then the PE does not count cycles in Non-secure EL0. Otherwise, this mechanism has no effect on filtering of cycles in Non-secure EL0. 0b0 When PMCCFILTR.U == 0, this mechanism has no effect on filtering of cycles. When PMCCFILTR.U == 1, the PE does not count cycles in Non-secure EL0. 0b1 When PMCCFILTR.U == 0, the PE does not count cycles in Non-secure EL0. When PMCCFILTR.U == 1, this mechanism has no effect on filtering of cycles. AU '0' AU When EL3 is implemented 28 28 28 Reserved, RES0. Otherwise NSH 27 27 0 EL2 filtering. Controls counting cycles in EL2. If EL3 is implemented and FEAT_SEL2 is implemented, then counting cycles in Secure EL2 is further controlled by PMCCFILTR.SH. 0b0 The PE does not count cycles in EL2. 0b1 This mechanism has no effect on filtering of cycles. AU '0' AU When EL2 is implemented 27 27 27 Reserved, RES0. Otherwise 26 22 26:22 Reserved, RES0. RLU 21 21 0 Realm EL0 filtering. Controls counting cycles in Realm EL0. If PMCCFILTR.RLU is not equal to PMCCFILTR.U, then the PE does not count cycles in Realm EL0. Otherwise, this mechanism has no effect on filtering of cycles in Realm EL0. 0b0 When PMCCFILTR.U == 0, this mechanism has no effect on filtering of cycles. When PMCCFILTR.U == 1, the PE does not count cycles in Realm EL0. 0b1 When PMCCFILTR.U == 0, the PE does not count cycles in Realm EL0. When PMCCFILTR.U == 1, this mechanism has no effect on filtering of cycles. AU AU When FEAT_RME is implemented 21 21 21 Reserved, RES0. Otherwise 20 0 20:0 Reserved, RES0. PMCCFILTR can also be accessed by using PMXEVTYPER with PMSELR.SEL set to 0b11111. Permitted reads and writes of PMCCFILTR are RAZ/WI if all of the following are true: FEAT_PMUv3p9 is implemented. EL0 is the current Exception level. EL1 is using AArch64. PMUSERENR_EL0.UEN is 1. PMUACR_EL1.C is 0. Permitted writes of PMCCFILTR are ignored if all of the following are true: FEAT_PMUv3p9 is implemented. EL0 is the current Exception level. EL1 is using AArch64. PMUSERENR_EL0.{UEN,CR} is {1,1}. MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !(IsFeatureImplemented(FEAT_AA32) && IsFeatureImplemented(FEAT_PMUv3)) then Undefined(); elsif PSTATE.EL == EL0 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then Undefined(); elsif IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL1) && (PMUSERENR_EL0().EN == '0' && (!IsFeatureImplemented(FEAT_PMUv3p9) || PMUSERENR_EL0().UEN == '0')) then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); else AArch64_AArch32SystemAccessTrap(EL1, 0x03); end; elsif IsFeatureImplemented(FEAT_AA32EL1) && ELUsingAArch32(EL1) && PMUSERENR().EN == '0' then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2)) && HCR().TGE == '1' then AArch32_TakeHypTrapException(0x00); else Undefined(); end; elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL1)) && !ELIsInHost(EL0) && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGRTR_EL2().PMCCFILTR_EL0 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && MDCR_EL2().TPM == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2)) && HDCR().TPM == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; else if IsFeatureImplemented(FEAT_PMUv3p9) && IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL2) && PMUSERENR_EL0().UEN == '1' && PMUACR_EL1().C == '0' then R(t) = Zeros{32}; else R(t) = PMCCFILTR(); end; end; elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && MDCR_EL2().TPM == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HDCR().TPM == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; else R(t) = PMCCFILTR(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then Undefined(); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; else R(t) = PMCCFILTR(); end; elsif PSTATE.EL == EL3 then R(t) = PMCCFILTR(); end; MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !(IsFeatureImplemented(FEAT_AA32) && IsFeatureImplemented(FEAT_PMUv3)) then Undefined(); elsif PSTATE.EL == EL0 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then Undefined(); elsif IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL1) && (PMUSERENR_EL0().EN == '0' && (!IsFeatureImplemented(FEAT_PMUv3p9) || PMUSERENR_EL0().UEN == '0')) then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); else AArch64_AArch32SystemAccessTrap(EL1, 0x03); end; elsif IsFeatureImplemented(FEAT_AA32EL1) && ELUsingAArch32(EL1) && PMUSERENR().EN == '0' then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2)) && HCR().TGE == '1' then AArch32_TakeHypTrapException(0x00); else Undefined(); end; elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL1)) && !ELIsInHost(EL0) && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGWTR_EL2().PMCCFILTR_EL0 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && MDCR_EL2().TPM == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2)) && HDCR().TPM == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; else if IsFeatureImplemented(FEAT_PMUv3p9) && IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL2) && PMUSERENR_EL0().UEN == '1' && (PMUACR_EL1().C == '0' || PMUSERENR_EL0().CR == '1') then return; else PMCCFILTR() = R(t); end; end; elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && MDCR_EL2().TPM == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HDCR().TPM == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; else PMCCFILTR() = R(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then Undefined(); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_AArch32SystemAccessTrap(EL3, 0x03); end; else PMCCFILTR() = R(t); end; elsif PSTATE.EL == EL3 then PMCCFILTR() = R(t); end; 2026-03-26 20:27:25 2026-03_rel