RVBAR Reset Vector Base Address Register when FEAT_AA32EL1 is implemented If EL3 is not implemented, contains the IMPLEMENTATION DEFINED address that execution starts from after reset when executing in AArch32 state. Reset Management This register is implemented only if the highest Exception level implemented is capable of using AArch32, and is not EL3. RVBAR is a 32-bit register. ResetAddress 31 1 31:1 Bits [31:1] of the IMPLEMENTATION DEFINED address that execution starts from after reset when executing in 32-bit state. This field has an IMPLEMENTATION DEFINED value. RO 0 0 0 Reserved, RES1. MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !IsFeatureImplemented(FEAT_AA32EL1) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if IsHighestEL(EL1) then R(t) = RVBAR(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T12 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T12 == '1' then AArch32_TakeHypTrapException(0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && IsCurrentSecurityState(SS_Secure) then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif IsFeatureImplemented(FEAT_AA64EL3) && !ELUsingAArch32(EL3) && IsCurrentSecurityState(SS_Secure) then AArch64_AArch32SystemAccessTrap(EL3, 0x03); else Undefined(); end; elsif PSTATE.EL == EL2 then if IsHighestEL(EL2) then R(t) = RVBAR(); else Undefined(); end; elsif PSTATE.EL == EL3 then R(t) = MVBAR(); end; 2026-03-26 20:27:25 2026-03_rel