<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<register_page>
  <registers>
  
    <register execution_state="AArch32" is_register="True" is_internal="True" is_stub_entry="False">
      <reg_short_name>TRFCR</reg_short_name>
        
        <reg_long_name>Trace Filter Control Register</reg_long_name>



      
            <reg_condition otherwise="UNDEFINED">when FEAT_AA32EL1 is implemented and FEAT_TRF is implemented</reg_condition>
      




          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        



    
      
      <reg_mapping>
        
  

    

  

    <mapped_name filename="AArch64-trfcr_el1.xml">TRFCR_EL1</mapped_name>
  <mapped_type>Architectural</mapped_type>
      <mapped_execution_state>AArch64</mapped_execution_state>
    <mapped_from_startbit>31</mapped_from_startbit>
    <mapped_from_endbit>0</mapped_from_endbit>
    <mapped_to_startbit>31</mapped_to_startbit>
    <mapped_to_endbit>0</mapped_to_endbit>
    <mapped_from_rangeset output="31:0">
      <range>
        <msb>31</msb>
        <lsb>0</lsb>
      </range>
    </mapped_from_rangeset>
    <mapped_to_rangeset output="31:0">
      <range>
        <msb>31</msb>
        <lsb>0</lsb>
      </range>
    </mapped_to_rangeset>

      </reg_mapping>

      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Provides EL1 controls for Trace.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>Debug</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>TRFCR is a 32-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="32">
  <text_before_fields/>
  <field id="fieldset_0-31_7" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>31</field_msb>
    <field_lsb>7</field_lsb>
    <rel_range>31:7</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-6_5" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>TS</field_name>
    <field_msb>6</field_msb>
    <field_lsb>5</field_lsb>
    <rel_range>6:5</rel_range>
    <field_description order="before">
      <para>Timestamp Control. Controls which timebase is used for trace timestamps.</para>
    </field_description>
    <field_description order="after"><para>All other values are reserved.</para>
<para>This field is ignored by the PE when any of the following are true:</para>
<list type="unordered">
<listitem><content>EL2 is implemented and <register_link state="AArch32" id="AArch32-htrfcr.xml">HTRFCR</register_link>.TS != <binarynumber>0b00</binarynumber>.</content>
</listitem><listitem><content><function>SelfHostedTraceEnabled()</function> == FALSE.</content>
</listitem></list></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b01</field_value>
        <field_value_description>
          <para>Virtual timestamp. The traced timestamp is the physical counter value minus the value of <register_link state="AArch32" id="AArch32-cntvoff.xml">CNTVOFF</register_link>.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b10</field_value>
        <field_value_description><para>Guest physical timestamp. The traced timestamp is the physical counter value minus a physical offset. If any of the following are true, the physical offset is zero, otherwise the physical offset is the value of <register_link state="AArch64" id="AArch64-cntpoff_el2.xml">CNTPOFF_EL2</register_link>:</para>
<list type="unordered">
<listitem><content>EL3 is implemented and is using AArch32.</content>
</listitem><listitem><content>EL3 is implemented, using AArch64, and <register_link state="AArch64" id="AArch64-scr_el3.xml">SCR_EL3</register_link>.ECVEn is 0.</content>
</listitem><listitem><content>EL2 is using AArch32.</content>
</listitem><listitem><content>EL2 is using AArch64 and <register_link state="AArch64" id="AArch64-cnthctl_el2.xml">CNTHCTL_EL2</register_link>.ECV is 0.</content>
</listitem><listitem><content><xref filename="A_armv8_architecture_extensions.fm" linkend="FEAT_ECV_POFF">FEAT_ECV_POFF</xref> is not implemented.</content>
</listitem></list></field_value_description>
        <field_value_condition>When FEAT_ECV is implemented</field_value_condition>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b11</field_value>
        <field_value_description>
          <para>Physical timestamp. The traced timestamp is the physical counter value.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-4_2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>4</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>4:2</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-1_1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>E1TRE</field_name>
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>1</rel_range>
    <field_description order="before">
      <para>EL1 Trace Enable.</para>
    </field_description>
    <field_description order="after">
      <para>This field is ignored if <function>SelfHostedTraceEnabled</function>() == FALSE.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Tracing is prohibited in PL1 modes.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Tracing is allowed in PL1 modes.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-0_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>E0TRE</field_name>
    <field_msb>0</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>EL0 Trace Enable.</para>
    </field_description>
    <field_description order="after"><para>This field is ignored if any of the following are true:</para>
<list type="unordered">
<listitem><content><function>SelfHostedTraceEnabled</function>() == FALSE.</content>
</listitem><listitem><content>EL2 is implemented and enabled in the current security state and <register_link state="AArch32" id="AArch32-hcr.xml">HCR</register_link>.TGE == 1.</content>
</listitem></list></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Tracing is prohibited at EL0.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Tracing is allowed at EL0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="32">
  <fieldat id="fieldset_0-31_7" msb="31" lsb="7"/>
  <fieldat id="fieldset_0-6_5" msb="6" lsb="5"/>
  <fieldat id="fieldset_0-4_2" msb="4" lsb="2"/>
  <fieldat id="fieldset_0-1_1" msb="1" lsb="1"/>
  <fieldat id="fieldset_0-0_0" msb="0" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    
        
        <access_mechanism accessor="MRC TRFCR" type="SystemAccessor">
            <encoding>
            <access_instruction>MRC{&lt;c&gt;}{&lt;q&gt;} &lt;coproc&gt;, {#}&lt;opc1&gt;, &lt;Rt&gt;, &lt;CRn&gt;, &lt;CRm&gt;{, {#}&lt;opc2&gt;}</access_instruction>
                
                <enc n="coproc" v="0b1111"/>
                
                <enc n="opc1" v="0b000"/>
                
                <enc n="CRn" v="0b0001"/>
                
                <enc n="CRm" v="0b0010"/>
                
                <enc n="opc2" v="0b001"/>
            </encoding>
            <access_permission>
                <ps name="MRC" sections="1" secttype="access_permission">
                <pstext>
if !(IsFeatureImplemented(FEAT_AA32EL1) &amp;&amp; IsFeatureImplemented(FEAT_TRF)) then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; PSTATE.M != M32_Monitor &amp;&amp; SDCR().TTRF == '1' then
        Undefined();
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL2) &amp;&amp; !ELUsingAArch32(EL2) &amp;&amp; HSTR_EL2().T1 == '1' then
        AArch64_AArch32SystemAccessTrap(EL2, 0x03);
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL2) &amp;&amp; ELUsingAArch32(EL2) &amp;&amp; HSTR().T1 == '1' then
        AArch32_TakeHypTrapException(0x03);
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL2) &amp;&amp; !ELUsingAArch32(EL2) &amp;&amp; MDCR_EL2().TTRF == '1' then
        AArch64_AArch32SystemAccessTrap(EL2, 0x03);
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL2) &amp;&amp; ELUsingAArch32(EL2) &amp;&amp; HDCR().TTRF == '1' then
        AArch32_TakeHypTrapException(0x03);
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_AArch32SystemAccessTrap(EL3, 0x03);
        end;
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; PSTATE.M != M32_Monitor &amp;&amp; SDCR().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch32_TakeMonitorTrapException();
        end;
    else
        R(t) = TRFCR();
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; SDCR().TTRF == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_AArch32SystemAccessTrap(EL3, 0x03);
        end;
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; SDCR().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch32_TakeMonitorTrapException();
        end;
    else
        R(t) = TRFCR();
    end;
elsif PSTATE.EL == EL3 then
    if PSTATE.M != M32_Monitor &amp;&amp; SDCR().TTRF == '1' then
        AArch32_TakeMonitorTrapException();
    else
        R(t) = TRFCR();
    end;
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>
    
        
        <access_mechanism accessor="MCR TRFCR" type="SystemAccessor">
            <encoding>
            <access_instruction>MCR{&lt;c&gt;}{&lt;q&gt;} &lt;coproc&gt;, {#}&lt;opc1&gt;, &lt;Rt&gt;, &lt;CRn&gt;, &lt;CRm&gt;{, {#}&lt;opc2&gt;}</access_instruction>
                
                <enc n="coproc" v="0b1111"/>
                
                <enc n="opc1" v="0b000"/>
                
                <enc n="CRn" v="0b0001"/>
                
                <enc n="CRm" v="0b0010"/>
                
                <enc n="opc2" v="0b001"/>
            </encoding>
            <access_permission>
                <ps name="MCR" sections="1" secttype="access_permission">
                <pstext>
if !(IsFeatureImplemented(FEAT_AA32EL1) &amp;&amp; IsFeatureImplemented(FEAT_TRF)) then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; PSTATE.M != M32_Monitor &amp;&amp; SDCR().TTRF == '1' then
        Undefined();
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL2) &amp;&amp; !ELUsingAArch32(EL2) &amp;&amp; HSTR_EL2().T1 == '1' then
        AArch64_AArch32SystemAccessTrap(EL2, 0x03);
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL2) &amp;&amp; ELUsingAArch32(EL2) &amp;&amp; HSTR().T1 == '1' then
        AArch32_TakeHypTrapException(0x03);
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL2) &amp;&amp; !ELUsingAArch32(EL2) &amp;&amp; MDCR_EL2().TTRF == '1' then
        AArch64_AArch32SystemAccessTrap(EL2, 0x03);
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL2) &amp;&amp; ELUsingAArch32(EL2) &amp;&amp; HDCR().TTRF == '1' then
        AArch32_TakeHypTrapException(0x03);
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_AArch32SystemAccessTrap(EL3, 0x03);
        end;
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; PSTATE.M != M32_Monitor &amp;&amp; SDCR().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch32_TakeMonitorTrapException();
        end;
    else
        TRFCR() = R(t);
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; SDCR().TTRF == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA64EL3) &amp;&amp; !ELUsingAArch32(EL3) &amp;&amp; MDCR_EL3().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_AArch32SystemAccessTrap(EL3, 0x03);
        end;
    elsif HaveEL(EL3) &amp;&amp; IsFeatureImplemented(FEAT_AA32EL3) &amp;&amp; ELUsingAArch32(EL3) &amp;&amp; SDCR().TTRF == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch32_TakeMonitorTrapException();
        end;
    else
        TRFCR() = R(t);
    end;
elsif PSTATE.EL == EL3 then
    if PSTATE.M != M32_Monitor &amp;&amp; SDCR().TTRF == '1' then
        AArch32_TakeMonitorTrapException();
    else
        TRFCR() = R(t);
    end;
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>