VBAR Vector Base Address Register when FEAT_AA32EL1 is implemented VBAR_EL1 Architectural AArch64 31 0 31 0 31 0 31 0 When high exception vectors are not selected, holds the vector base address for exceptions that are not taken to Monitor mode or to Hyp mode. Software must program VBAR(NS) with the required initial value as part of the PE boot sequence. Exception This register is banked between VBAR and VBAR_S and VBAR_NS. VBAR is a 32-bit register. This register has the following instances: VBAR, when EL3 is not implemented or FEAT_AA64 is implemented. VBAR_S, when FEAT_AA32EL3 is implemented. VBAR_NS, when FEAT_AA32EL3 is implemented. VBA Vector Base Address 31 5 31:5 Vector Base Address. Bits[31:5] of the base address of the exception vectors for exceptions taken to this Exception level. Bits[4:0] of an exception vector are the exception offset. ID 4 0 4:0 Reserved, RES0. MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !IsFeatureImplemented(FEAT_AA32EL1) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T12 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T12 == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then R(t) = VBAR_NS(); else R(t) = VBAR(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then R(t) = VBAR_NS(); else R(t) = VBAR(); end; elsif PSTATE.EL == EL3 then if SCR().NS == '0' then R(t) = VBAR_S(); else R(t) = VBAR_NS(); end; end; MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>} if !IsFeatureImplemented(FEAT_AA32EL1) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && HSTR_EL2().T12 == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) && HSTR().T12 == '1' then AArch32_TakeHypTrapException(0x03); elsif HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then VBAR_NS() = R(t); else VBAR() = R(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && IsFeatureImplemented(FEAT_AA32EL3) && ELUsingAArch32(EL3) then VBAR_NS() = R(t); else VBAR() = R(t); end; elsif PSTATE.EL == EL3 then if SCR().NS == '0' && CP15SDISABLE == HIGH then Undefined(); elsif SCR().NS == '0' && CP15SDISABLE2 == HIGH then Undefined(); else if SCR().NS == '0' then VBAR_S() = R(t); else VBAR_NS() = R(t); end; end; end; 2026-03-26 20:27:25 2026-03_rel