AMAIR_EL3 Auxiliary Memory Attribute Indirection Register (EL3) when EL3 is implemented and FEAT_AA64 is implemented Provides IMPLEMENTATION DEFINED memory attributes for the memory regions specified by MAIR_EL3. IMP DEF Memory Secure AMAIR_EL3 is a 64-bit register. AMAIR_EL3 is permitted to be cached in a TLB. IMPLEMENTATION DEFINED 63 0 63:0 IMPLEMENTATION DEFINED. AU MRS <Xt>, AMAIR_EL3 if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then Undefined(); elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then X{64}(t) = AMAIR_EL3(); end; MSR AMAIR_EL3, <Xt> if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then Undefined(); elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then if IsFeatureImplemented(FEAT_FGWTE3) && FGWTE3_EL3().AMAIR_EL3 == '1' then AArch64_SystemAccessTrap(EL3, 0x18); else AMAIR_EL3() = X{64}(t); end; end; 2026-03-26 20:27:25 2026-03_rel