BRBCR_EL1 Branch Record Buffer Control Register (EL1) when FEAT_BRBE is implemented Controls the Branch Record Buffer. BRBE BRBCR_EL1 is a 64-bit register. 63 24 63:24 Reserved, RES0. EXCEPTION 23 23 23 Enable the recording of entry to EL1 via an exception. 0b0 Disable the recording of Branch records for exceptions when taken to EL1. 0b1 Enable the recording of Branch records for exceptions when taken to EL1. AU AU ERTN 22 22 22 Allow the recording Branch records for exception return instructions from EL1. 0b0 Disable the recording Branch records for exception return instructions from EL1. 0b1 Enable the recording Branch records for exception return instructions from EL1. AU AU 21 10 21:10 Reserved, RES0. FZPSS 9 9 0 Freeze BRBE on PMU Snapshot. 0b0 Branch recording is not affected by this control. 0b1 If either EL2 is not implemented or BRBCR_EL2.FZPSS is 1, then a BRBE freeze event occurs when a successful Capture event occurs. AU When FEAT_PMUv3_SS is implemented 9 9 9 Reserved, RES0. Otherwise FZP 8 8 0 Freeze BRBE on PMU overflow. 0b0 Branch recording is not affected by this control. 0b1 A BRBE freeze event occurs when the PE is in a Non-prohibited region, BRBFCR_EL1.PAUSED is 0, and any of the following applies: For any event counter PMEVCNTR<m>_EL0 in the first range, PMOVSCLR_EL0[m] is 1. FEAT_PMUv3_ICNTR is implemented and PMOVSCLR_EL0.F0 is 1. For more information about event counter ranges, see MDCR_EL2.HPMN. AU AU When FEAT_PMUv3 is implemented 8 8 8 Reserved, RES0. Otherwise 7 7 7 Reserved, RES0. TS 6 5 6:5 Timestamp Control. All other values are reserved. This field is ignored by the PE when EL2 is implemented and BRBCR_EL2.TS != 0b00. 0b01 Virtual timestamp. The BRBE recorded timestamp is the physical counter value, minus the value of CNTVOFF_EL2. 0b10 Guest physical timestamp. The BRBE recorded timestamp is the physical counter value minus a physical offset. If any of the following are true, the physical offset is zero, otherwise the physical offset is the value of CNTPOFF_EL2: EL3 is implemented and SCR_EL3.ECVEn == 0. EL2 is implemented and CNTHCTL_EL2.ECV == 0. FEAT_ECV_POFF is not implemented. When FEAT_ECV is implemented 0b11 Physical timestamp. The BRBE recorded timestamp is the physical counter value. AU AU MPRED 4 4 4 Mask the recording of mispredicts. 0b0 Disable the recording of mispredict information. 0b1 Allow the recording of mispredict information. AU AU CC 3 3 3 Enable the recording of cycle count information. 0b0 Disable the recording of cycle count information. 0b1 Allow the recording of cycle count information. AU AU 2 2 2 Reserved, RES0. E1BRE 1 1 1 EL1 Branch recording enable. 0b0 Branch recording prohibited at EL1. 0b1 Branch recording enabled at EL1. '0' E0BRE 0 0 0 EL0 Branch recording enable. This field is ignored by the PE when all of the following are true: The Effective value of HCR_EL2.TGE is 1. EL2 is implemented and enabled in the current Security state. 0b0 Branch recording prohibited at EL0. 0b1 Branch recording enabled at EL0. '0' When the Effective value of HCR_EL2.E2H is 1, without explicit synchronization, accesses from EL3 using the accessor name BRBCR_EL1 or BRBCR_EL12 are not guaranteed to be ordered with respect to accesses using the other accessor name. MRS <Xt>, BRBCR_EL1 if !IsFeatureImplemented(FEAT_BRBE) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGRTR_EL2().nBRBCTL == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EffectiveHCR_EL2_NVx() IN {'111'} then X{64}(t) = NVMem(0x8E0); else X{64}(t) = BRBCR_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif ELIsInHost(EL2) then X{64}(t) = BRBCR_EL2(); else X{64}(t) = BRBCR_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = BRBCR_EL1(); end; MRS <Xt>, BRBCR_EL12 When FEAT_VHE is implemented if !IsFeatureImplemented(FEAT_BRBE) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() == '101' then X{64}(t) = NVMem(0x8E0); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then AArch64_SystemAccessTrap(EL2, 0x18); else Undefined(); end; elsif PSTATE.EL == EL2 then if ELIsInHost(EL2) then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = BRBCR_EL1(); end; else Undefined(); end; elsif PSTATE.EL == EL3 then if ELIsInHost(EL2) then X{64}(t) = BRBCR_EL1(); else Undefined(); end; end; MSR BRBCR_EL1, <Xt> if !IsFeatureImplemented(FEAT_BRBE) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGWTR_EL2().nBRBCTL == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EffectiveHCR_EL2_NVx() IN {'111'} then NVMem(0x8E0) = X{64}(t); else BRBCR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif ELIsInHost(EL2) then BRBCR_EL2() = X{64}(t); else BRBCR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then BRBCR_EL1() = X{64}(t); end; MSR BRBCR_EL12, <Xt> When FEAT_VHE is implemented if !IsFeatureImplemented(FEAT_BRBE) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() == '101' then NVMem(0x8E0) = X{64}(t); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then AArch64_SystemAccessTrap(EL2, 0x18); else Undefined(); end; elsif PSTATE.EL == EL2 then if ELIsInHost(EL2) then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().SBRBE != '11' && SCR_EL3().NS == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().SBRBE IN {'x0'} && SCR_EL3().NS == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else BRBCR_EL1() = X{64}(t); end; else Undefined(); end; elsif PSTATE.EL == EL3 then if ELIsInHost(EL2) then BRBCR_EL1() = X{64}(t); else Undefined(); end; end; 2026-03-26 20:27:25 2026-03_rel