CNTPS_CTL_EL1 Counter-timer Physical Secure Timer Control Register when EL3 is implemented and FEAT_AA64 is implemented Control register for the secure physical timer, usually accessible at EL3 but configurably accessible at EL1 in Secure state. Timer CNTPS_CTL_EL1 is a 64-bit register. 63 3 63:3 Reserved, RES0. ISTATUS 2 2 2 The status of the timer. This bit indicates whether the timer condition is met: When the value of the ENABLE bit is 1, ISTATUS indicates whether the timer condition is met. ISTATUS takes no account of the value of the IMASK bit. If the value of ISTATUS is 1 and the value of IMASK is 0 then the timer interrupt is asserted. When the value of the ENABLE bit is 0, the ISTATUS field is UNKNOWN. 0b0 Timer condition is not met. 0b1 Timer condition is met. AU RO IMASK 1 1 1 Timer interrupt mask bit. Permitted values are: For more information, see the description of the ISTATUS bit. 0b0 Timer interrupt is not masked by the IMASK bit. 0b1 Timer interrupt is masked by the IMASK bit. AU ENABLE 0 0 0 Enables the timer. Permitted values are: Setting this bit to 0 disables the timer output signal, but the timer value accessible from CNTPS_TVAL_EL1 continues to count down. Disabling the output signal might be a power-saving option. 0b0 Timer disabled. 0b1 Timer enabled. AU MRS <Xt>, CNTPS_CTL_EL1 if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && SCR_EL3().NS == '0' then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().ST == '0' then Undefined(); elsif SCR_EL3().EEL2 == '1' then Undefined(); elsif SCR_EL3().ST == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = CNTPS_CTL_EL1(); end; else Undefined(); end; elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then X{64}(t) = CNTPS_CTL_EL1(); end; MSR CNTPS_CTL_EL1, <Xt> if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && SCR_EL3().NS == '0' then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().ST == '0' then Undefined(); elsif SCR_EL3().EEL2 == '1' then Undefined(); elsif SCR_EL3().ST == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else CNTPS_CTL_EL1() = X{64}(t); end; else Undefined(); end; elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then CNTPS_CTL_EL1() = X{64}(t); end; 2026-03-26 20:27:25 2026-03_rel