CNTPS_TVAL_EL1 Counter-timer Physical Secure Timer TimerValue Register when EL3 is implemented and FEAT_AA64 is implemented Holds the timer value for the secure physical timer, usually accessible at EL3 but configurably accessible at EL1 in Secure state. Timer CNTPS_TVAL_EL1 is a 64-bit register. 63 32 63:32 Reserved, RES0. TimerValue 31 0 31:0 The TimerValue view of the secure physical timer. On a read of this register: If CNTPS_CTL_EL1.ENABLE is 0, the value returned is UNKNOWN. If CNTPS_CTL_EL1.ENABLE is 1, the value returned is (CNTPS_CVAL_EL1 - CNTPCT_EL0). On a write of this register, CNTPS_CVAL_EL1 is set to (CNTPCT_EL0 + TimerValue), where TimerValue is treated as a signed 32-bit integer. When CNTPS_CTL_EL1.ENABLE is 1, the timer condition is met when (CNTPCT_EL0 - CNTPS_CVAL_EL1) is greater than or equal to zero. This means that TimerValue acts like a 32-bit downcounter timer. When the timer condition is met: CNTPS_CTL_EL1.ISTATUS is set to 1. If CNTPS_CTL_EL1.IMASK is 0, an interrupt is generated. When CNTPS_CTL_EL1.ENABLE is 0, the TimerValue cannot be read but continues to decrement. When the timer is enabled, the TimerValue represents the elapsed time whether that time was spent enabled or disabled. AU MRS <Xt>, CNTPS_TVAL_EL1 if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && SCR_EL3().NS == '0' then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().ST == '0' then Undefined(); elsif SCR_EL3().EEL2 == '1' then Undefined(); elsif SCR_EL3().ST == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else if CNTPS_CTL_EL1().ENABLE == '0' then X{64}(t) = ARBITRARY:bits(64); else X{64}(t) = ZeroExtend{64}((CNTPS_CVAL_EL1() - PhysicalCountInt())[31:0]); end; end; else Undefined(); end; elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then if CNTPS_CTL_EL1().ENABLE == '0' then X{64}(t) = ARBITRARY:bits(64); else X{64}(t) = ZeroExtend{64}((CNTPS_CVAL_EL1() - PhysicalCountInt())[31:0]); end; end; MSR CNTPS_TVAL_EL1, <Xt> if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && SCR_EL3().NS == '0' then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().ST == '0' then Undefined(); elsif SCR_EL3().EEL2 == '1' then Undefined(); elsif SCR_EL3().ST == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else CNTPS_CVAL_EL1() = SignExtend{64}(X{64}(t)[31:0]) + PhysicalCountInt(); end; else Undefined(); end; elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then CNTPS_CVAL_EL1() = SignExtend{64}(X{64}(t)[31:0]) + PhysicalCountInt(); end; 2026-03-26 20:27:25 2026-03_rel