<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register execution_state="AArch64" is_register="True" is_internal="True" is_stub_entry="False">
      <reg_short_name>CurrentEL</reg_short_name>
        
        <reg_long_name>Current Exception Level</reg_long_name>



      
            <reg_condition otherwise="UNDEFINED">when FEAT_AA64 is implemented</reg_condition>
      




          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Holds the current Exception level.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
            <reg_group>PSTATE</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>CurrentEL is a 64-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="64">
  <text_before_fields/>
  <field id="fieldset_0-63_4" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>63</field_msb>
    <field_lsb>4</field_lsb>
    <rel_range>63:4</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-3_2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>EL</field_name>
    <field_msb>3</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>3:2</rel_range>
    <field_description order="before">
      <para>Current Exception level.</para>
    </field_description>
    <field_description order="after">
      <para>When the Effective value of <register_link state="AArch64" id="AArch64-hcr_el2.xml">HCR_EL2</register_link>.NV is 1, EL1 read accesses to the CurrentEL register return the value of <binarynumber>0b10</binarynumber> in this field.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b00</field_value>
        <field_value_description>
          <para>EL0.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b01</field_value>
        <field_value_description>
          <para>EL1.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b10</field_value>
        <field_value_description>
          <para>EL2.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b11</field_value>
        <field_value_description>
          <para>EL3.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_conditions>
          <field_reset_condition condition="the highest implemented Exception level is EL1">
            <field_reset>
              <field_reset_number>'01'</field_reset_number>
            </field_reset>
          </field_reset_condition>
          <field_reset_condition condition="the highest implemented Exception level is EL2">
            <field_reset>
              <field_reset_number>'10'</field_reset_number>
            </field_reset>
          </field_reset_condition>
          <field_reset_condition>
            <field_reset>
              <field_reset_number>'11'</field_reset_number>
            </field_reset>
          </field_reset_condition>
        </field_reset_conditions>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-1_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>1</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>1:0</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="64">
  <fieldat id="fieldset_0-63_4" msb="63" lsb="4"/>
  <fieldat id="fieldset_0-3_2" msb="3" lsb="2"/>
  <fieldat id="fieldset_0-1_0" msb="1" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    
        
        <access_mechanism accessor="MRS CurrentEL" type="SystemAccessor">
            <encoding>
            <access_instruction>MRS &lt;Xt&gt;, CurrentEL</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b000"/>
                
                <enc n="CRn" v="0b0100"/>
                
                <enc n="CRm" v="0b0010"/>
                
                <enc n="op2" v="0b010"/>
            </encoding>
            <access_permission>
                <ps name="MRS" sections="1" secttype="access_permission">
                <pstext>
if !IsFeatureImplemented(FEAT_AA64) then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if EffectiveHCR_EL2_NVx() IN {'xx1'} then
        X{64}(t) = Zeros{60} :: '10' :: Zeros{2};
    else
        X{64}(t) = Zeros{60} :: PSTATE.EL :: Zeros{2};
    end;
elsif PSTATE.EL == EL2 then
    X{64}(t) = Zeros{60} :: PSTATE.EL :: Zeros{2};
elsif PSTATE.EL == EL3 then
    X{64}(t) = Zeros{60} :: PSTATE.EL :: Zeros{2};
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>