DBGBVR<n>_EL1 Debug Breakpoint Value Registers when FEAT_AA64 is implemented 0 63 DBGBVR<n> Architectural AArch32 31 0 31 0 31 0 31 0 DBGBXVR<n> Architectural AArch32 63 32 31 0 63 32 31 0 DBGBVR<n>_EL1 Architectural External 63 0 63 0 63 0 63 0 Holds a virtual address, or a VMID and/or a context ID, for use in breakpoint matching. Forms breakpoint n together with control register DBGBCR<n>_EL1. Debug How this register is interpreted depends on the value of DBGBCR<n>_EL1.BT. When DBGBCR<n>_EL1.BT is 0b000x, this register holds a virtual address. When DBGBCR<n>_EL1.BT is 0b001x, 0b011x, or 0b110x, this register holds a Context ID. When DBGBCR<n>_EL1.BT is 0b100x, this register holds a VMID. When DBGBCR<n>_EL1.BT is 0b101x, this register holds a VMID and a Context ID. When DBGBCR<n>_EL1.BT is 0b111x, this register holds two Context ID values. For other values of DBGBCR<n>_EL1.BT, this register is RES0. If breakpoint n is not implemented then accesses to this register are UNDEFINED. DBGBVR<n>_EL1 is a 64-bit register. When DBGBCR<n>_EL1.BT IN {'000x'} DBGBCR<n>_EL1.BT==0b000x RESS[14:8] 63 57 63:57 Reserved, Sign extended. Software must set all bits in this field to the same value as the most significant bit of the VA field. If all bits in this field are not the same value as the most significant bit of the VA field, then all of the following apply: It is CONSTRAINED UNPREDICTABLE whether the PE ignores this field when comparing an address. If the breakpoint is not context-aware, it is IMPLEMENTATION DEFINED whether the value read back in each bit of this field is a copy of the most significant bit of the VA field or the value written. VA[56:53] 56 53 3:0 Extension to VA[48:2]. For more information, see VA[48:2]. AU When FEAT_LVA3 is implemented RESS[7:4] 56 53 3:0 Extension to RESS[14:8]. For more information, see RESS[14:8]. Otherwise VA[52:49] 52 49 3:0 Extension to VA[48:2]. For more information, see VA[48:2]. AU When FEAT_LVA is implemented RESS[3:0] 52 49 3:0 Extension to RESS[14:8]. For more information, see RESS[14:8]. Otherwise VA[48:2] 48 2 48:2 Bits[48:2] of the address value for comparison. When FEAT_LVA3 is implemented, (VA[56:53]:VA[52:49]) forms the upper part of the address value. If FEAT_LVA3 is not implemented, bits VA[56:53] are part of the RESS field. When FEAT_LVA is implemented, VA[52:49] forms the upper part of the address value. If FEAT_LVA is not implemented, bits [52:49] are part of the RESS field. AU 1 0 1:0 Reserved, RES0. When DBGBCR<n>_EL1.BT IN {'001x'} DBGBCR<n>_EL1.BT==0b001x 63 32 63:32 Reserved, RES0. ContextID 31 0 31:0 Context ID value for comparison. The value is compared against CONTEXTIDR_EL2 when the Effective value of HCR_EL2.E2H is 1, and either: The PE is executing at EL2. HCR_EL2.TGE is 1, the PE is executing at EL0, and EL2 is enabled in the current Security state. Otherwise, the value is compared against CONTEXTIDR_EL1. AU When DBGBCR<n>_EL1.BT IN {'011x'}, EL2 is implemented, and FEAT_Debugv8p1 is implemented DBGBCR<n>_EL1.BT==0b011x, EL2 is implemented, and FEAT_Debugv8p2 is implemented 63 32 63:32 Reserved, RES0. ContextID 31 0 31:0 Context ID value for comparison against CONTEXTIDR_EL1. AU When DBGBCR<n>_EL1.BT IN {'100x'} and EL2 is implemented DBGBCR<n>_EL1.BT==0b100x and EL2 is implemented 63 48 63:48 Reserved, RES0. VMID[15:8] 47 40 7:0 Extension to VMID[7:0]. For more information, see DBGBVR<n>_EL1.VMID[7:0]. AU When FEAT_VMID16 is implemented, VTCR_EL2.VS == '1', and EL2 is using AArch64 47 40 47:40 Reserved, RES0. Otherwise VMID[7:0] 39 32 39:32 VMID value for comparison. The VMID is 8 bits when any of the following are true: EL2 is using AArch32. VTCR_EL2.VS is 0. FEAT_VMID16 is not implemented. AU 31 0 31:0 Reserved, RES0. When DBGBCR<n>_EL1.BT IN {'101x'} and EL2 is implemented DBGBCR<n>_EL1.BT==0b101x and EL2 is implemented 63 48 63:48 Reserved, RES0. VMID[15:8] 47 40 7:0 Extension to VMID[7:0]. For more information, see DBGBVR<n>_EL1.VMID[7:0]. AU When FEAT_VMID16 is implemented, VTCR_EL2.VS == '1', and EL2 is using AArch64 47 40 47:40 Reserved, RES0. Otherwise VMID[7:0] 39 32 39:32 VMID value for comparison. The VMID is 8 bits when any of the following are true: EL2 is using AArch32. VTCR_EL2.VS is 0. FEAT_VMID16 is not implemented. AU ContextID 31 0 31:0 Context ID value for comparison against CONTEXTIDR_EL1. AU When DBGBCR<n>_EL1.BT IN {'110x'}, EL2 is implemented, and FEAT_Debugv8p1 is implemented DBGBCR<n>_EL1.BT==0b110x, EL2 is implemented, and FEAT_Debugv8p1 is implemented ContextID2 63 32 63:32 Context ID value for comparison against CONTEXTIDR_EL2. AU 31 0 31:0 Reserved, RES0. When DBGBCR<n>_EL1.BT IN {'111x'}, EL2 is implemented, and FEAT_Debugv8p1 is implemented DBGBCR<n>_EL1.BT==0b111x, EL2 is implemented, and FEAT_Debugv8p1 is implemented ContextID2 63 32 63:32 Context ID value for comparison against CONTEXTIDR_EL2. AU ContextID 31 0 31:0 Context ID value for comparison against CONTEXTIDR_EL1. AU When DBGBCR<n>_EL1.BT IN {'000x'} When DBGBCR<n>_EL1.BT IN {'001x'} When DBGBCR<n>_EL1.BT IN {'011x'}, EL2 is implemented, and FEAT_Debugv8p1 is implemented When DBGBCR<n>_EL1.BT IN {'100x'} and EL2 is implemented When DBGBCR<n>_EL1.BT IN {'101x'} and EL2 is implemented When DBGBCR<n>_EL1.BT IN {'110x'}, EL2 is implemented, and FEAT_Debugv8p1 is implemented When DBGBCR<n>_EL1.BT IN {'111x'}, EL2 is implemented, and FEAT_Debugv8p1 is implemented When FEAT_Debugv8p9 is implemented, a PE is permitted to support up to 64 implemented breakpoints. 0-15 MRS <Xt>, DBGBVR<m>_EL1 let m:integer = UInt(CRm[3:0]); if !IsFeatureImplemented(FEAT_AA64) then Undefined(); elsif (!IsFeatureImplemented(FEAT_Debugv8p9) && m >= NUM_BREAKPOINTS) || (IsFeatureImplemented(FEAT_Debugv8p9) && m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16) >= NUM_BREAKPOINTS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGRTR_EL2().DBGBVRn_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && MDCR_EL2().[TDE,TDA] != '00' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then Halt(DebugHalt_SoftwareAccess); else if IsFeatureImplemented(FEAT_Debugv8p9) then X{64}(t) = DBGBVR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)); else X{64}(t) = DBGBVR_EL1(m); end; end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then Halt(DebugHalt_SoftwareAccess); else if IsFeatureImplemented(FEAT_Debugv8p9) then X{64}(t) = DBGBVR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)); else X{64}(t) = DBGBVR_EL1(m); end; end; elsif PSTATE.EL == EL3 then if OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then Halt(DebugHalt_SoftwareAccess); else if IsFeatureImplemented(FEAT_Debugv8p9) then X{64}(t) = DBGBVR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)); else X{64}(t) = DBGBVR_EL1(m); end; end; end; 0-15 MSR DBGBVR<m>_EL1, <Xt> let m:integer = UInt(CRm[3:0]); if !IsFeatureImplemented(FEAT_AA64) then Undefined(); elsif (!IsFeatureImplemented(FEAT_Debugv8p9) && m >= NUM_BREAKPOINTS) || (IsFeatureImplemented(FEAT_Debugv8p9) && m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16) >= NUM_BREAKPOINTS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGWTR_EL2().DBGBVRn_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && MDCR_EL2().[TDE,TDA] != '00' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then Halt(DebugHalt_SoftwareAccess); else if IsFeatureImplemented(FEAT_Debugv8p9) then DBGBVR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)) = X{64}(t); else DBGBVR_EL1(m) = X{64}(t); end; end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then Halt(DebugHalt_SoftwareAccess); else if IsFeatureImplemented(FEAT_Debugv8p9) then DBGBVR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)) = X{64}(t); else DBGBVR_EL1(m) = X{64}(t); end; end; elsif PSTATE.EL == EL3 then if OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then Halt(DebugHalt_SoftwareAccess); else if IsFeatureImplemented(FEAT_Debugv8p9) then DBGBVR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)) = X{64}(t); else DBGBVR_EL1(m) = X{64}(t); end; end; end; 2026-03-26 20:27:25 2026-03_rel