DBGWCR<n>_EL1
Debug Watchpoint Control Registers
when FEAT_AA64 is implemented
0
63
DBGWCR<n>
Architectural
AArch32
31
0
31
0
31
0
31
0
DBGWCR<n>_EL1
Architectural
External
31
0
31
0
31
0
31
0
DBGWCR<n>_EL1
Architectural
External
63
32
63
32
63
32
63
32
when FEAT_Debugv8p9 is implemented
Holds control information for a watchpoint. Forms watchpoint n together with value register DBGWVR<n>_EL1.
Debug
If watchpoint n is not implemented then accesses to this register are UNDEFINED.
DBGWCR<n>_EL1 is a 64-bit register.
63
32
63:32
Reserved, RES0.
LBNX
31
30
1:0
Linked Breakpoint Number.
For Linked data address watchpoints, with DBGWCR<n>_EL1.LBN, specifies the index of the breakpoint linked to.
For all other watchpoint types, this field is ignored and reads of the register return an UNKNOWN value.
This field extends DBGWCR<n>_EL1.LBN to support up to 64 implemented breakpoints.
AU
When FEAT_Debugv8p9 is implemented
31
30
31:30
Reserved, RES0.
Otherwise
SSCE
29
29
0
Security State Control Extended.
The fields that indicate when the watchpoint can be generated are:
HMC, PAC, SSC, and SSCE.
These fields must be considered in combination, and the values that are permitted for these fields are constrained.
AU
When FEAT_RME is implemented
29
29
29
Reserved, RES0.
Otherwise
MASK
28
24
28:24
Address Mask. Only address ranges up to 2GB can be watched using a single mask.
All other values are reserved.
Indicates the number of masked address bits, from 0b00011 masking 3 address bits (0x00000007 mask for address) to 0b11111 masking 31 address bits (0x7FFFFFFF mask for address).
If programmed with a reserved value, the watchpoint behaves as if one of the following:
DBGWCR<n>_EL1.MASK has been programmed with a defined value, which might be 0b00000 (no mask), other than for a direct read of DBGWCR<n>_EL1.
The watchpoint is disabled.
0b00000
No mask.
0b00011..0b11111
Number of address bits masked.
AU
23
23
23
Reserved, RES0.
WT2
22
22
0
Watchpoint Type 2. With DBGWCR<n>_EL1.WT, specifies watchpoint type.
0b0
Watchpoint n is an address match watchpoint.
0b1
Watchpoint n is an address mismatch watchpoint.
AU
When FEAT_BWE2 is implemented
22
22
22
Reserved, RES0.
Otherwise
21
21
21
Reserved, RES0.
WT
20
20
20
Watchpoint type. Possible values are:
0b0
Unlinked watchpoint.
0b1
Linked watchpoint.
AU
LBN
19
16
19:16
Linked Breakpoint Number.
For Linked data address watchpoints, with DBGWCR<n>_EL1.LBNX when implemented, specifies the index of the breakpoint linked to.
For all other watchpoint types, this field is ignored and reads of the register return an UNKNOWN value.
AU
SSC
15
14
15:14
Security state control. Determines the Security states under which a Watchpoint debug event for watchpoint n is generated.
The fields that indicate when the watchpoint can be generated are:
HMC, PAC, SSC, and SSCE.
These fields must be considered in combination, and the values that are permitted for these fields are constrained.
For more information on the operation of these fields, see 'Execution conditions for which a watchpoint generates Watchpoint exceptions'.
For more information on the effect of programming the fields to a reserved value, see 'Reserved DBGWCR<n>_EL1.{SSC, HMC, PAC} values'.
AU
HMC
13
13
13
Higher mode control. Determines the debug perspective for deciding when a Watchpoint debug event for watchpoint n is generated.
The fields that indicate when the watchpoint can be generated are:
HMC, PAC, SSC, and SSCE.
These fields must be considered in combination, and the values that are permitted for these fields are constrained.
For more information on the operation of these fields, see 'Execution conditions for which a watchpoint generates Watchpoint exceptions'.
AU
BAS
12
5
12:5
Byte address select. Each bit of this field selects whether a byte from within the word or doubleword addressed by DBGWVR<n>_EL1 is being watched.
BASDescription
xxxxxxx1Match byte at DBGWVR<n>_EL1
xxxxxx1xMatch byte at DBGWVR<n>_EL1 + 1
xxxxx1xxMatch byte at DBGWVR<n>_EL1 + 2
xxxx1xxxMatch byte at DBGWVR<n>_EL1 + 3
In cases where DBGWVR<n>_EL1 addresses a doubleword:
BASDescription, if DBGWVR<n>_EL1[2] == 0
xxx1xxxxMatch byte at DBGWVR<n>_EL1 + 4
xx1xxxxxMatch byte at DBGWVR<n>_EL1 + 5
x1xxxxxxMatch byte at DBGWVR<n>_EL1 + 6
1xxxxxxxMatch byte at DBGWVR<n>_EL1 + 7
If DBGWVR<n>_EL1[2] == 1, only BAS[3:0] are used and BAS[7:4] are ignored. Arm deprecates setting DBGWVR<n>_EL1[2] == 1.
The valid values for BAS are nonzero binary numbers all of whose set bits are contiguous. All other values are reserved and must not be used by software. See 'Reserved DBGWCR<n>_EL1.BAS values'.
AU
LSC
4
3
4:3
Load/store control. This field enables watchpoint matching on the type of access being made. Possible values of this field are:
All other values are reserved, but must behave as if the watchpoint is disabled. Software must not rely on this property as the behavior of reserved values might change in a future revision of the architecture.
0b01
Match instructions that load from a watchpointed address.
0b10
Match instructions that store to a watchpointed address.
0b11
Match instructions that load from or store to a watchpointed address.
AU
PAC
2
1
2:1
Privilege of access control. Determines the Exception level or levels at which a Watchpoint debug event for watchpoint n is generated.
The fields that indicate when the watchpoint can be generated are:
HMC, PAC, SSC, and SSCE.
These fields must be considered in combination, and the values that are permitted for these fields are constrained.
For more information on the operation of these fields, see 'Execution conditions for which a watchpoint generates Watchpoint exceptions'.
AU
E
0
0
0
Enable watchpoint n.
This field is ignored by the PE and treated as zero when all of the following are true:
Any of the following are true:
HaltOnBreakpointOrWatchpoint() is FALSE and the Effective value of MDSCR_EL1.EMBWE is 0.
HaltOnBreakpointOrWatchpoint() is TRUE and the Effective value of EDSCR2.EHBWE is 0.
FEAT_Debugv8p9 is implemented.
n >= 16.
0b0
Watchpoint n disabled.
0b1
Watchpoint n enabled.
AU
When FEAT_Debugv8p9 is implemented, a PE is permitted to support up to 64 implemented watchpoints.
0-15
MRS <Xt>, DBGWCR<m>_EL1
let m:integer = UInt(CRm[3:0]);
if !IsFeatureImplemented(FEAT_AA64) then
Undefined();
elsif (!IsFeatureImplemented(FEAT_Debugv8p9) && m >= NUM_WATCHPOINTS) || (IsFeatureImplemented(FEAT_Debugv8p9) && m + (UInt(MDSELR_EL1().BANK) * 16) >= NUM_WATCHPOINTS) then
Undefined();
elsif PSTATE.EL == EL0 then
Undefined();
elsif PSTATE.EL == EL1 then
if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then
Undefined();
elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGRTR_EL2().DBGWCRn_EL1 == '1' then
AArch64_SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && MDCR_EL2().[TDE,TDA] != '00' then
AArch64_SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then
if EL3SDDUndef() then
Undefined();
else
AArch64_SystemAccessTrap(EL3, 0x18);
end;
elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then
Halt(DebugHalt_SoftwareAccess);
else
if IsFeatureImplemented(FEAT_Debugv8p9) then
X{64}(t) = DBGWCR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16));
else
X{64}(t) = DBGWCR_EL1(m);
end;
end;
elsif PSTATE.EL == EL2 then
if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then
Undefined();
elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then
if EL3SDDUndef() then
Undefined();
else
AArch64_SystemAccessTrap(EL3, 0x18);
end;
elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then
Halt(DebugHalt_SoftwareAccess);
else
if IsFeatureImplemented(FEAT_Debugv8p9) then
X{64}(t) = DBGWCR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16));
else
X{64}(t) = DBGWCR_EL1(m);
end;
end;
elsif PSTATE.EL == EL3 then
if OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then
Halt(DebugHalt_SoftwareAccess);
else
if IsFeatureImplemented(FEAT_Debugv8p9) then
X{64}(t) = DBGWCR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16));
else
X{64}(t) = DBGWCR_EL1(m);
end;
end;
end;
0-15
MSR DBGWCR<m>_EL1, <Xt>
let m:integer = UInt(CRm[3:0]);
if !IsFeatureImplemented(FEAT_AA64) then
Undefined();
elsif (!IsFeatureImplemented(FEAT_Debugv8p9) && m >= NUM_WATCHPOINTS) || (IsFeatureImplemented(FEAT_Debugv8p9) && m + (UInt(MDSELR_EL1().BANK) * 16) >= NUM_WATCHPOINTS) then
Undefined();
elsif PSTATE.EL == EL0 then
Undefined();
elsif PSTATE.EL == EL1 then
if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then
Undefined();
elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGWTR_EL2().DBGWCRn_EL1 == '1' then
AArch64_SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && MDCR_EL2().[TDE,TDA] != '00' then
AArch64_SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then
if EL3SDDUndef() then
Undefined();
else
AArch64_SystemAccessTrap(EL3, 0x18);
end;
elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then
Halt(DebugHalt_SoftwareAccess);
else
if IsFeatureImplemented(FEAT_Debugv8p9) then
DBGWCR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)) = X{64}(t);
else
DBGWCR_EL1(m) = X{64}(t);
end;
end;
elsif PSTATE.EL == EL2 then
if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then
Undefined();
elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then
if EL3SDDUndef() then
Undefined();
else
AArch64_SystemAccessTrap(EL3, 0x18);
end;
elsif OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then
Halt(DebugHalt_SoftwareAccess);
else
if IsFeatureImplemented(FEAT_Debugv8p9) then
DBGWCR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)) = X{64}(t);
else
DBGWCR_EL1(m) = X{64}(t);
end;
end;
elsif PSTATE.EL == EL3 then
if OSLSR_EL1().OSLK == '0' && HaltingAllowed() && EDSCR().TDA == '1' then
Halt(DebugHalt_SoftwareAccess);
else
if IsFeatureImplemented(FEAT_Debugv8p9) then
DBGWCR_EL1(m + (UInt(EffectiveMDSELR_EL1_BANK()) * 16)) = X{64}(t);
else
DBGWCR_EL1(m) = X{64}(t);
end;
end;
end;
2026-03-26 20:27:25
2026-03_rel