DLR_EL0 Debug Link Register when FEAT_AA64 is implemented DLR Architectural AArch32 31 0 31 0 31 0 31 0 In Debug state, holds the address to restart from. Debug Secondary DLR_EL0 is a 64-bit register. ADDR Restart address 63 0 63:0 Restart address. MRS <Xt>, DLR_EL0 if !IsFeatureImplemented(FEAT_AA64) then Undefined(); elsif !Halted() then Undefined(); else X{64}(t) = DLR_EL0(); end; MSR DLR_EL0, <Xt> if !IsFeatureImplemented(FEAT_AA64) then Undefined(); elsif !Halted() then Undefined(); else DLR_EL0() = X{64}(t); end; 2026-03-26 20:27:25 2026-03_rel