ERRSELR_EL1 Error Record Select Register when FEAT_RAS is implemented ERRSELR Architectural AArch32 31 0 31 0 31 0 31 0 Selects an error record to be accessed through the Error Record System registers. RAS If ERRIDR_EL1 indicates that zero error records are implemented, then it is IMPLEMENTATION DEFINED whether ERRSELR_EL1 is UNDEFINED or RES0. ERRSELR_EL1 is a 64-bit register. 63 16 63:16 Reserved, RES0. SEL 15 0 15:0 Selects the error record accessed through the ERX registers. For example, if ERRSELR_EL1.SEL is 0x0004, then direct reads and writes of ERXSTATUS_EL1 access ERR4STATUS. If ERRSELR_EL1.SEL is greater than or equal to ERRIDR_EL1.NUM, then all of the following apply: The value read back from ERRSELR_EL1.SEL is UNKNOWN. Unless the access to an ERX*_EL1 register generates a higher priority exception, one of the following occurs: An UNKNOWN error record is selected. The ERX*_EL1 registers are RAZ/WI. ERX*_EL1 register reads and writes are NOPs. ERX*_EL1 register reads and writes are UNDEFINED. AU MRS <Xt>, ERRSELR_EL1 if !IsFeatureImplemented(FEAT_RAS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TERR == '1' then Undefined(); elsif EL2Enabled() && HCR_EL2().TERR == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGRTR_EL2().ERRSELR_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = ERRSELR_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TERR == '1' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = ERRSELR_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = ERRSELR_EL1(); end; MSR ERRSELR_EL1, <Xt> if !IsFeatureImplemented(FEAT_RAS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TERR == '1' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TWERR == '1' then Undefined(); elsif EL2Enabled() && HCR_EL2().TERR == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGWTR_EL2().ERRSELR_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && SCR_EL3().TWERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else ERRSELR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TERR == '1' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TWERR == '1' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().TERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && SCR_EL3().TWERR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else ERRSELR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then ERRSELR_EL1() = X{64}(t); end; 2026-03-26 20:27:25 2026-03_rel