FGWTE3_EL3 Fine-Grained Write Traps EL3 when EL3 is implemented, FEAT_FGWTE3 is implemented, and FEAT_AA64 is implemented Provides controls for traps of MSR and MSRR writes to specified EL3 system registers. Unknown FGWTE3_EL3 is a 64-bit register. MSR accesses are trapped to EL3 and reported with EC syndrome value 0x18. MSRR accesses are trapped to EL3 and reported with EC syndrome value 0x14. The bits in this register are sticky. Writes to these bits have the following properties: A write of '0' is ignored. A write of '1' updates the bit to 1. 63 23 63:23 Reserved, RES0. GPCBW_EL3 22 22 0 Traps accesses of GPCBW_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_RME_GPC3 is implemented 22 22 22 Reserved, RES0. Otherwise VBAR_EL3 21 21 21 Traps accesses of VBAR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S TTBR0_EL3 20 20 20 Traps accesses of TTBR0_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S TPIDR_EL3 19 19 19 Traps accesses of TPIDR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S TCR_EL3 18 18 18 Traps accesses of TCR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S SPMROOTCR_EL3 17 17 0 Traps accesses of SPMROOTCR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_RME is implemented and FEAT_SPMU is implemented 17 17 17 Reserved, RES0. Otherwise SCTLR2_EL3 16 16 0 Traps accesses of SCTLR2_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_SCTLR2 is implemented 16 16 16 Reserved, RES0. Otherwise SCTLR_EL3 15 15 15 Traps accesses of SCTLR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S PIR_EL3 14 14 0 Traps accesses of PIR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_S1PIE is implemented 14 14 14 Reserved, RES0. Otherwise MPAM3_EL3 13 13 0 Traps accesses of MPAM3_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_MPAM is implemented 13 13 13 Reserved, RES0. Otherwise MECID_RL_A_EL3 12 12 0 Traps accesses of MECID_RL_A_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_MEC is implemented 12 12 12 Reserved, RES0. Otherwise MDCR_EL3 11 11 11 Traps accesses of MDCR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S MAIR2_EL3 10 10 0 Traps accesses of MAIR2_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_AIE is implemented 10 10 10 Reserved, RES0. Otherwise MAIR_EL3 9 9 9 Traps accesses of MAIR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S GPTBR_EL3 8 8 0 Traps accesses of GPTBR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_RME is implemented 8 8 8 Reserved, RES0. Otherwise GPCCR_EL3 7 7 0 Traps accesses of GPCCR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_RME is implemented 7 7 7 Reserved, RES0. Otherwise GCSPR_EL3 6 6 0 Traps accesses of GCSPR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_GCS is implemented 6 6 6 Reserved, RES0. Otherwise GCSCR_EL3 5 5 0 Traps accesses of GCSCR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_GCS is implemented 5 5 5 Reserved, RES0. Otherwise AMAIR2_EL3 4 4 0 Traps accesses of AMAIR2_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S When FEAT_AIE is implemented 4 4 4 Reserved, RES0. Otherwise AMAIR_EL3 3 3 3 Traps accesses of AMAIR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S AFSR1_EL3 2 2 2 Traps accesses of AFSR1_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S AFSR0_EL3 1 1 1 Traps accesses of AFSR0_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S ACTLR_EL3 0 0 0 Traps accesses of ACTLR_EL3 to EL3. 0b0 This control does not cause any instructions to be trapped. 0b1 MSR write accesses to the specified register are trapped to EL3 with EC syndrome value 0x18. '0' W1S MRS <Xt>, FGWTE3_EL3 if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_FGWTE3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then Undefined(); elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then X{64}(t) = FGWTE3_EL3(); end; MSR FGWTE3_EL3, <Xt> if !(HaveEL(EL3) && IsFeatureImplemented(FEAT_FGWTE3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then Undefined(); elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then FGWTE3_EL3() = X{64}(t); end; 2026-03-26 20:27:25 2026-03_rel