GCSCR_EL2 Guarded Control Stack Control Register (EL2) when FEAT_GCS is implemented Controls the Guarded Control Stack at EL2. Guarded Control Stack registers If EL2 is not implemented, this register is RES0 from EL3. GCSCR_EL2 is a 64-bit register. 63 10 63:10 Reserved, RES0. STREn 9 9 9 Execution of the following instructions are trapped: GCSSTR. GCSSTTR if any of the following are true. The Effective value of HCR_EL2.{E2H, TGE} is not {1, 1}. The Effective value of HCR_EL2.{E2H, TGE} is {1, 1}, and PSTATE.UAO is 1. 0b0 Execution of any of the specified instructions at EL2 cause a GCS exception. 0b1 This control does not cause any instructions to be trapped. '0' PUSHMEn 8 8 8 Trap GCSPUSHM instruction. 0b0 Execution of a GCSPUSHM instruction at EL2 causes a Trap exception. 0b1 This control does not cause any instructions to be trapped. '0' 7 7 7 Reserved, RES0. EXLOCKEN 6 6 6 Exception state lock. Prevents MSR instructions from writing to ELR_EL2 or SPSR_EL2. 0b0 EL2 exception state locking disabled. 0b1 EL2 exception state locking enabled. '0' RVCHKEN 5 5 5 Return value check enable. 0b0 Return value checking disabled at EL2. 0b1 Return value checking enabled at EL2. AU 4 1 4:1 Reserved, RES0. PCRSEL 0 0 0 Guarded Control Stack procedure call return enable selection. 0b0 Guarded Control Stack at EL2 is not PCR Selected. 0b1 Guarded Control Stack at EL2 is PCR Selected. '0' When the Effective value of HCR_EL2.E2H is 1, without explicit synchronization, accesses from EL2 using the accessor name GCSCR_EL2 or GCSCR_EL1 are not guaranteed to be ordered with respect to accesses using the other accessor name. MRS <Xt>, GCSCR_EL2 if !IsFeatureImplemented(FEAT_GCS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() IN {'xx1'} then AArch64_SystemAccessTrap(EL2, 0x18); else Undefined(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().GCSEn == '0' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().GCSEn == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = GCSCR_EL2(); end; elsif PSTATE.EL == EL3 then X{64}(t) = GCSCR_EL2(); end; MSR GCSCR_EL2, <Xt> if !IsFeatureImplemented(FEAT_GCS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() IN {'xx1'} then AArch64_SystemAccessTrap(EL2, 0x18); else Undefined(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().GCSEn == '0' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().GCSEn == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else GCSCR_EL2() = X{64}(t); end; elsif PSTATE.EL == EL3 then GCSCR_EL2() = X{64}(t); end; MRS <Xt>, GCSCR_EL1 if !IsFeatureImplemented(FEAT_GCS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().GCSEn == '0' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGRTR_EL2().nGCS_EL1 == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().GCSEn == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EffectiveHCR_EL2_NVx() IN {'111'} then X{64}(t) = NVMem(0x8D0); else X{64}(t) = GCSCR_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().GCSEn == '0' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().GCSEn == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif ELIsInHost(EL2) then X{64}(t) = GCSCR_EL2(); else X{64}(t) = GCSCR_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = GCSCR_EL1(); end; MSR GCSCR_EL1, <Xt> if !IsFeatureImplemented(FEAT_GCS) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().GCSEn == '0' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGWTR_EL2().nGCS_EL1 == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().GCSEn == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EffectiveHCR_EL2_NVx() IN {'111'} then NVMem(0x8D0) = X{64}(t); else GCSCR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().GCSEn == '0' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().GCSEn == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif ELIsInHost(EL2) then GCSCR_EL2() = X{64}(t); else GCSCR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then GCSCR_EL1() = X{64}(t); end; 2026-03-26 20:27:25 2026-03_rel