ICV_BPR1_EL1 Interrupt Controller Virtual Binary Point Register 1 when GICv3 is implemented, EL2 is implemented, and FEAT_AA64 is implemented ICV_BPR1 Architectural AArch32 31 0 31 0 31 0 31 0 Defines the point at which the priority value fields split into two parts, the group priority field and the subpriority field. The group priority field determines virtual Group 1 interrupt preemption. GICV Control GIC ICV_BPR1_EL1 is a 64-bit register. 63 3 63:3 Reserved, RES0. BinaryPoint 2 0 2:0 If the GIC is configured to use separate binary point fields for Group 0 and Group 1 interrupts, the value of this field controls how the 8-bit interrupt priority field is split into a group priority field, that determines interrupt preemption, and a subpriority field. For more information about priorities, see 'Priority grouping' in ARM® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0 (ARM IHI 0069). An attempt to program this field to a value less than the minimum value sets the field to the minimum value. If ICV_CTLR_EL1.CBPR is set to 1, Non-secure EL1 reads return ICV_BPR0_EL1 + 1 saturated to 0b111. Non-secure EL1 writes are ignored. If ICV_CTLR_EL1.CBPR is set to 1, Secure EL1 reads return ICV_BPR0_EL1. Secure EL1 writes modify ICV_BPR0_EL1. AU For Non-secure writes, the minimum value of this field is the minimum value of ICH_VMCR_EL2.VBPR0 plus one. For Secure writes, the minimum value of this field is the minimum value of ICH_VMCR_EL2.VBPR0. An attempt to program the binary point field to a value less than the minimum value sets the field to the minimum value. On a reset, the binary point field is UNKNOWN. MRS <Xt>, ICC_BPR1_EL1 if !(IsFeatureImplemented(FEAT_GICv3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().IRQ == '1' then Undefined(); elsif ICC_SRE_EL1().SRE == '0' then AArch64_SystemAccessTrap(EL1, 0x18); elsif EL2Enabled() && ICH_HCR_EL2().TALL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2().IMO == '1' then X{64}(t) = ICV_BPR1_EL1(); elsif HaveEL(EL3) && SCR_EL3().IRQ == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) then if EffectiveSCR_EL3_NS() == '0' then X{64}(t) = ICC_BPR1_EL1_S(); else X{64}(t) = ICC_BPR1_EL1_NS(); end; else X{64}(t) = ICC_BPR1_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().IRQ == '1' then Undefined(); elsif ICC_SRE_EL2().SRE == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().IRQ == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) then if EffectiveSCR_EL3_NS() == '0' then X{64}(t) = ICC_BPR1_EL1_S(); else X{64}(t) = ICC_BPR1_EL1_NS(); end; else X{64}(t) = ICC_BPR1_EL1(); end; elsif PSTATE.EL == EL3 then if ICC_SRE_EL3().SRE == '0' then AArch64_SystemAccessTrap(EL3, 0x18); else if EffectiveSCR_EL3_NS() == '0' then X{64}(t) = ICC_BPR1_EL1_S(); else X{64}(t) = ICC_BPR1_EL1_NS(); end; end; end; MSR ICC_BPR1_EL1, <Xt> if !(IsFeatureImplemented(FEAT_GICv3) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().IRQ == '1' then Undefined(); elsif ICC_SRE_EL1().SRE == '0' then AArch64_SystemAccessTrap(EL1, 0x18); elsif EL2Enabled() && ICH_HCR_EL2().TALL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2().IMO == '1' then ICV_BPR1_EL1() = X{64}(t); elsif HaveEL(EL3) && SCR_EL3().IRQ == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) then if EffectiveSCR_EL3_NS() == '0' then ICC_BPR1_EL1_S() = X{64}(t); else ICC_BPR1_EL1_NS() = X{64}(t); end; else ICC_BPR1_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().IRQ == '1' then Undefined(); elsif ICC_SRE_EL2().SRE == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().IRQ == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) then if EffectiveSCR_EL3_NS() == '0' then ICC_BPR1_EL1_S() = X{64}(t); else ICC_BPR1_EL1_NS() = X{64}(t); end; else ICC_BPR1_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then if ICC_SRE_EL3().SRE == '0' then AArch64_SystemAccessTrap(EL3, 0x18); else if EffectiveSCR_EL3_NS() == '0' then ICC_BPR1_EL1_S() = X{64}(t); else ICC_BPR1_EL1_NS() = X{64}(t); end; end; end; 2026-03-26 20:27:25 2026-03_rel