LOREA_EL1 LORegion End Address (EL1) when FEAT_LOR is implemented and FEAT_AA64 is implemented Holds the physical address of the end of the LORegion described in the current LORegion descriptor selected by LORC_EL1.DS. Memory This register is RES0 if any of the following apply: No LORegion descriptors are supported by the PE. LORC_EL1.DS points to a LORegion that is not supported by the PE. LOREA_EL1 is a 64-bit register. Any of the fields in this register are permitted to be cached in a TLB. 63 56 63:56 Reserved, RES0. EA[55:52] 55 52 3:0 Extension to EA[47:16]. For more information, see EA[47:16]. AU When FEAT_D128 is implemented 55 52 55:52 Reserved, RES0. Otherwise EA[51:48] 51 48 3:0 Extension to EA[47:16]. For more information, see EA[47:16]. AU When FEAT_LPA is implemented 51 48 51:48 Reserved, RES0. Otherwise EA[47:16] 47 16 47:16 Bits [47:16] of the end physical address of an LORegion described in the current LORegion descriptor selected by LORC_EL1.DS. Bits[15:0] of this address are 0xFFFF. For implementations with fewer than 48 bits, the upper bits of this field are RES0. When FEAT_LPA is implemented and 52-bit addresses are in use, EA[51:48] form bits [51:48] of the end physical address of the LORegion. Otherwise, when 52-bit addresses are not in use, EA[51:48] is RES0. AU 15 0 15:0 Reserved, RES0. MRS <Xt>, LOREA_EL1 if !(IsFeatureImplemented(FEAT_LOR) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TLOR == '1' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().NS == '0' then Undefined(); elsif EL2Enabled() && HCR_EL2().TLOR == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGRTR_EL2().LOREA_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().TLOR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = LOREA_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TLOR == '1' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().TLOR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = LOREA_EL1(); end; elsif PSTATE.EL == EL3 then if SCR_EL3().NS == '0' then Undefined(); else X{64}(t) = LOREA_EL1(); end; end; MSR LOREA_EL1, <Xt> if !(IsFeatureImplemented(FEAT_LOR) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TLOR == '1' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().NS == '0' then Undefined(); elsif EL2Enabled() && HCR_EL2().TLOR == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGWTR_EL2().LOREA_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().TLOR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else LOREA_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && SCR_EL3().NS == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TLOR == '1' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().TLOR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else LOREA_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then if SCR_EL3().NS == '0' then Undefined(); else LOREA_EL1() = X{64}(t); end; end; 2026-03-26 20:27:25 2026-03_rel