LORID_EL1 LORegionID (EL1) when FEAT_LOR is implemented and FEAT_AA64 is implemented Indicates the number of LORegions and LORegion descriptors supported by the PE. Memory Identification Registers If no LORegion descriptors are implemented, then the registers LORC_EL1, LORN_EL1, LOREA_EL1, and LORSA_EL1 are RES0. LORID_EL1 is a 64-bit register. 63 24 63:24 Reserved, RES0. LD 23 16 23:16 Number of LORegion descriptors supported by the PE. This is an 8-bit binary number. 0x00..0xFF The number of LORegions descriptors supported. RO 15 8 15:8 Reserved, RES0. LR 7 0 7:0 Number of LORegions supported by the PE. This is an 8-bit binary number. If LORID_EL1 indicates that no LORegions are implemented, then LoadLOAcquire and StoreLORelease will behave as LoadAcquire and StoreRelease. 0x00..0xFF The number of LORegions supported. RO MRS <Xt>, LORID_EL1 if !(IsFeatureImplemented(FEAT_LOR) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TLOR == '1' then Undefined(); elsif EL2Enabled() && HCR_EL2().TLOR == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HFGRTR_EL2().LORID_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3().TLOR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = LORID_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && SCR_EL3().TLOR == '1' then Undefined(); elsif HaveEL(EL3) && SCR_EL3().TLOR == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = LORID_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = LORID_EL1(); end; 2026-03-26 20:27:25 2026-03_rel