MDRAR_EL1 Monitor Debug ROM Address Register when FEAT_AA64 is implemented DBGDRAR Architectural AArch32 63 0 63 0 63 0 63 0 Defines the base physical address of a 4KB-aligned memory-mapped debug component, usually a ROM table that locates and describes the memory-mapped debug components in the system. Use of this register is deprecated. Debug MDRAR_EL1 is a 64-bit register. 63 56 63:56 Reserved, RES0. ROMADDR 55 12 55:12 When FEAT_D128 is implemented and MDRAR_EL1.Valid != '00' ROMADDR 43 0 43:0 Bits [55:12] of the ROM table physical address. Bits [11:0] of the ROM table physical address are zero. For implementations with fewer than 56 physical address bits, the corresponding upper bits of this field are RES0 In an implementation that includes EL3, ROMADDR is an address in Non-secure PA space. It is IMPLEMENTATION DEFINED whether the ROM table is also accessible in Secure PA space. If FEAT_RME is implemented, it is IMPLEMENTATION DEFINED whether the ROM table is also accessible in the Root or Realm PA spaces. Arm strongly recommends that bits ROMADDR[(PAsize-1):32] are zero in any system where the implementation only supports execution in AArch32 state. This field has an IMPLEMENTATION DEFINED value. RO When FEAT_D128 is implemented and MDRAR_EL1.Valid != '00' When FEAT_D128 is not implemented, FEAT_LPA is implemented, and MDRAR_EL1.Valid != '00' 43 40 43:40 Reserved, RES0. ROMADDR 39 0 39:0 Bits [51:12] of the ROM table physical address. Bits [11:0] of the ROM table physical address are zero. For implementations with fewer than 52 physical address bits, the corresponding upper bits of this field are RES0 In an implementation that includes EL3, ROMADDR is an address in Non-secure PA space. It is IMPLEMENTATION DEFINED whether the ROM table is also accessible in Secure PA space. If FEAT_RME is implemented, it is IMPLEMENTATION DEFINED whether the ROM table is also accessible in the Root or Realm PA spaces. Arm strongly recommends that bits ROMADDR[(PAsize-1):32] are zero in any system where the implementation only supports execution in AArch32 state. This field has an IMPLEMENTATION DEFINED value. RO When FEAT_D128 is not implemented, FEAT_LPA is implemented, and MDRAR_EL1.Valid != '00' When FEAT_D128 is not implemented, FEAT_LPA is not implemented, and MDRAR_EL1.Valid != '00' 43 36 43:36 Reserved, RES0. ROMADDR 35 0 35:0 Bits [39:12] of the ROM table physical address. Bits [11:0] of the ROM table physical address are zero. For implementations with fewer than 48 physical address bits, the corresponding upper bits of this field are RES0 In an implementation that includes EL3, ROMADDR is an address in Non-secure PA space. It is IMPLEMENTATION DEFINED whether the ROM table is also accessible in Secure PA space. If FEAT_RME is implemented, it is IMPLEMENTATION DEFINED whether the ROM table is also accessible in Root or Realm PA spaces. Arm strongly recommends that bits ROMADDR[(PAsize-1):32] are zero in any system where the implementation only supports execution in AArch32 state. This field has an IMPLEMENTATION DEFINED value. RO When FEAT_D128 is not implemented, FEAT_LPA is not implemented, and MDRAR_EL1.Valid != '00' When MDRAR_EL1.Valid == '00' 43 0 43:0 Reserved, UNKNOWN. When MDRAR_EL1.Valid == '00' 11 2 11:2 Reserved, RES0. Valid 1 0 1:0 This field indicates whether the ROM Table address is valid. Other values are reserved. Arm recommends implementations set this field to zero. 0b00 ROM Table address is not valid. Software must ignore ROMADDR. 0b11 ROM Table address is valid. RO MRS <Xt>, MDRAR_EL1 if !IsFeatureImplemented(FEAT_AA64) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then Undefined(); elsif EL2Enabled() && MDCR_EL2().[TDE,TDRA] != '00' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = MDRAR_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TDA == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = MDRAR_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = MDRAR_EL1(); end; 2026-03-26 20:27:25 2026-03_rel