MFAR_EL3
Physical Fault Address Register (EL3)
when (FEAT_PFAR is implemented or FEAT_RME is implemented) and FEAT_AA64 is implemented
Records the faulting physical address for a Granule Protection Check, synchronous External abort, or SError exception taken to EL3.
RAS
MFAR_EL3 is a 64-bit register.
When FEAT_RME is implemented and the exception is a GPC exception
NS
63
63
63
Together with MFAR_EL3.NSE, reports the physical address space of the access that triggered the exception.
NSENSMeaning
0b00b0When Secure state is implemented, Secure. Otherwise reserved.
0b00b1Non-secure.
0b10b0Root.
0b10b1Realm.
AU
NSE
62
62
62
Together with MFAR_EL3.NS, reports the physical address space of the access that triggered the exception.
For a description of the values derived by evaluating NS and NSE together, see MFAR_EL3.NS.
AU
61
56
61:56
Reserved, RES0.
FPA[55:52]
55
52
3:0
When FEAT_D128 is implemented, extension to MFAR_EL3.FPA[47:12].
AU
When FEAT_D128 is implemented
55
52
55:52
Reserved, RES0.
Otherwise
FPA[51:48]
51
48
3:0
When FEAT_LPA is implemented, extension to MFAR_EL3.FPA[47:12].
AU
When FEAT_LPA is implemented
51
48
51:48
Reserved, RES0.
Otherwise
FPA
47
12
47:12
Bits [47:12] of the Faulting Physical Address.
For implementations with fewer than 48 physical address bits, the corresponding upper bits in this field are RES0.
AU
11
0
11:0
Reserved, RES0.
When FEAT_PFAR is implemented and the exception is a synchronous External abort or SError exception
NS
63
63
0
Together with MFAR_EL3.NSE and MFAR_EL3.NSE2, reports the physical address space of the access that triggered the exception.
NSE2NSENSMeaning
0b00b00b0When Secure state is implemented, Secure. Otherwise reserved.
0b00b00b1Non-secure.
0b00b10b0Root.
0b00b10b1Realm.
0b10b00b0System Agent.
0b10b00b1NS Protected.
0b10b10b0Reserved.
0b10b10b1Reserved.
AU
When FEAT_RME_GDI is implemented
NS
63
63
0
Together with MFAR_EL3.NSE, reports the physical address space of the access that triggered the exception.
NSENSMeaning
0b00b0When Secure state is implemented, Secure. Otherwise reserved.
0b00b1Non-secure.
0b10b0Root.
0b10b1Realm.
AU
When FEAT_RME is implemented
NS
63
63
0
Non-secure. Reports the physical address space of the access that triggered the exception.
0b0
Secure physical address space.
0b1
Non-secure physical address space.
AU
Otherwise
NSE
62
62
0
Together with MFAR_EL3.NS, reports the physical address space of the access that triggered the exception.
For a description of the values derived by evaluating NS and NSE together, see MFAR_EL3.NS.
AU
When FEAT_RME is implemented
62
62
62
Reserved, RES0.
Otherwise
NSE2
61
61
0
Together with MFAR_EL3.NS and MFAR_EL3.NSE, reports the physical address space of the access that triggered the exception.
For a description of the values derived by evaluating NS, NSE, and NSE2 together, see MFAR_EL3.NS.
AU
When FEAT_RME_GDI is implemented
61
61
61
Reserved, RES0.
Otherwise
60
56
60:56
Reserved, RES0.
PA[55:52]
55
52
3:0
When FEAT_D128 is implemented, extension to MFAR_EL3.PA[47:0].
AU
When FEAT_D128 is implemented
55
52
55:52
Reserved, RES0.
Otherwise
PA[51:48]
51
48
3:0
When FEAT_LPA is implemented, extension to MFAR_EL3.PA[47:0].
AU
When FEAT_LPA is implemented
51
48
51:48
Reserved, RES0.
Otherwise
PA
47
0
47:0
Physical Address. Bits [47:0] of the aborting physical address.
For implementations with fewer than 48 physical address bits, the corresponding upper bits in this field are RES0.
The recorded address can be any address within the same naturally-aligned fault granule as the faulting physical address, where the size of the fault granule is IMPLEMENTATION DEFINED and no larger than the larger than:
The size of the range of values permitted to be recorded in FAR_EL3.
AU
When FEAT_RME is implemented and the exception is a GPC exception
When FEAT_PFAR is implemented and the exception is a synchronous External abort or SError exception
MFAR_EL3 is not valid and reads UNKNOWN if ESR_EL3.EC is recorded indicating an Abort or SError exception and ESR_EL3.PFV is recorded as 0.
MRS <Xt>, MFAR_EL3
if !((IsFeatureImplemented(FEAT_PFAR) || IsFeatureImplemented(FEAT_RME)) && IsFeatureImplemented(FEAT_AA64)) then
Undefined();
elsif PSTATE.EL == EL0 then
Undefined();
elsif PSTATE.EL == EL1 then
Undefined();
elsif PSTATE.EL == EL2 then
Undefined();
elsif PSTATE.EL == EL3 then
X{64}(t) = MFAR_EL3();
end;
MSR MFAR_EL3, <Xt>
if !((IsFeatureImplemented(FEAT_PFAR) || IsFeatureImplemented(FEAT_RME)) && IsFeatureImplemented(FEAT_AA64)) then
Undefined();
elsif PSTATE.EL == EL0 then
Undefined();
elsif PSTATE.EL == EL1 then
Undefined();
elsif PSTATE.EL == EL2 then
Undefined();
elsif PSTATE.EL == EL3 then
MFAR_EL3() = X{64}(t);
end;
2026-03-26 20:27:25
2026-03_rel