MPAM1_EL1 MPAM1 Register (EL1) when FEAT_MPAM is implemented MPAM3_EL3 Architectural AArch64 63 63 63 63 63 63 63 63 when (FEAT_MPAMv0p1 is implemented or FEAT_MPAMv1p0 is implemented) and EL3 is implemented MPAM2_EL2 Architectural AArch64 63 63 63 63 63 63 63 63 when (FEAT_MPAMv0p1 is implemented or FEAT_MPAMv1p0 is implemented), EL3 is not implemented, and EL2 is implemented Holds information to generate MPAM labels for memory requests when executing at EL1. MPAM If FEAT_MPAMv1p0 or FEAT_MPAMv0p1 is implemented, EL2 is implemented and enabled in the current Security state, and the MPAM virtualization option is present, then: If MPAMHCR_EL2.GSTAPP_PLK == 1 and the Effective value of HCR_EL2.TGE is 0, MPAM1_EL1 is used instead of MPAM0_EL1 to generate MPAM labels for memory requests when executing at EL0. If MPAMHCR_EL2.EL1_VPMEN == 1, MPAM PARTIDs in MPAM1_EL1 are virtual and mapped into physical PARTIDs for the current Security state. This mapping of MPAM1_EL1 virtual PARTIDs to physical PARTIDs when EL1_VPMEN is 1 also applies when MPAM1_EL1 is used at EL0 due to MPAMHCR_EL2.GSTAPP_PLK. MPAM1_EL1 is a 64-bit register. MPAMEN 63 63 63 MPAM Enable. MPAM is enabled when MPAMEN == 1. When disabled, all PARTIDs and PMGs are output as their default value in the corresponding ID space. 0b0 The default PARTID and default PMG are output in MPAM information. 0b1 MPAM information is output based on the MPAMn_ELx register for ELn according the MPAM configuration. '0' EL3 is implemented MPAM3_EL3.MPAMEN == '0' RAZ/WI EL3 is implemented MPAM3_EL3.MPAMEN == '1' RAO/WI EL3 is not implemented EL2 is implemented MPAM2_EL2.MPAMEN == '0' RAZ/WI EL3 is not implemented EL2 is implemented MPAM2_EL2.MPAMEN == '1' RAO/WI 62 61 62:61 Reserved, RES0. FORCED_NS 60 60 0 In the Secure state, FORCED_NS indicates the state of MPAM3_EL3.FORCE_NS. Always reads as 0 in the Non-secure state. Writes are ignored. 0b0 In the Non-secure state, always reads as 0. In the Secure state, indicates that MPAM3_EL3.FORCE_NS == 0. 0b1 In the Secure state, indicates that MPAM3_EL3.FORCE_NS == 1. RO When FEAT_MPAMv0p1 is implemented 60 60 60 Reserved, RES0. Otherwise 59 55 59:55 Reserved, RES0. ALTSP_FRCD 54 54 0 Alternative PARTID forced for PARTIDs in this register. This bit indicates that a higher Exception level has forced the PARTIDs in this register to use the alternative PARTID space defined for the current Security state. In MPAM1_EL1, it also indicates that MPAM0_EL1 is forced to use alternative PARTID space. For more information, see 'In a PE with FEAT_RME, selection of primary or alternative PARTID space'. 0b0 The PARTIDs in MPAM1_EL1 and MPAM0_EL1 are using the primary PARTID space. 0b1 The PARTIDs in MPAM1_EL1 and MPAM0_EL1 are using the alternative PARTID space. When !UsePrimarySpaceEL10() RAO/WI RAZ/WI When FEAT_RME is implemented and MPAMIDR_EL1.HAS_ALTSP == '1' 54 54 54 Reserved, RES0. Otherwise 53 48 53:48 Reserved, RES0. PMG_D 47 40 47:40 Performance monitoring group property for PARTID_D. AU PMG_I 39 32 39:32 Performance monitoring group property for PARTID_I. AU PARTID_D 31 16 31:16 Partition ID for data accesses, including load and store accesses, made from EL1. AU PARTID_I 15 0 15:0 Partition ID for instruction accesses made from EL1. AU When the Effective value of HCR_EL2.E2H is 1, without explicit synchronization, accesses from EL3 using the accessor name MPAM1_EL1 or MPAM1_EL12 are not guaranteed to be ordered with respect to accesses using the other accessor name. None of the fields in this register are permitted to be cached in a TLB. MRS <Xt>, MPAM1_EL1 if !IsFeatureImplemented(FEAT_MPAM) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EL2Enabled() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM2_EL2().TRAPMPAM1EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EffectiveHCR_EL2_NVx() IN {'111'} then X{64}(t) = NVMem(0x900); else X{64}(t) = MPAM1_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif ELIsInHost(EL2) then X{64}(t) = MPAM2_EL2(); else X{64}(t) = MPAM1_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = MPAM1_EL1(); end; MSR MPAM1_EL1, <Xt> if !IsFeatureImplemented(FEAT_MPAM) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EL2Enabled() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM2_EL2().TRAPMPAM1EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EffectiveHCR_EL2_NVx() IN {'111'} then NVMem(0x900) = X{64}(t); else MPAM1_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif ELIsInHost(EL2) then MPAM2_EL2() = X{64}(t); else MPAM1_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then MPAM1_EL1() = X{64}(t); end; MRS <Xt>, MPAM1_EL12 When FEAT_VHE is implemented if !IsFeatureImplemented(FEAT_MPAM) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() == '101' then X{64}(t) = NVMem(0x900); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else AArch64_SystemAccessTrap(EL2, 0x18); end; else Undefined(); end; elsif PSTATE.EL == EL2 then if ELIsInHost(EL2) then if HaveEL(EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = MPAM1_EL1(); end; else Undefined(); end; elsif PSTATE.EL == EL3 then if ELIsInHost(EL2) then X{64}(t) = MPAM1_EL1(); else Undefined(); end; end; MSR MPAM1_EL12, <Xt> When FEAT_VHE is implemented if !IsFeatureImplemented(FEAT_MPAM) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if EffectiveHCR_EL2_NVx() == '101' then NVMem(0x900) = X{64}(t); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then if HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else AArch64_SystemAccessTrap(EL2, 0x18); end; else Undefined(); end; elsif PSTATE.EL == EL2 then if ELIsInHost(EL2) then if HaveEL(EL3) && EL3SDDUndefPriority() && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then Undefined(); elsif HaveEL(EL3) && (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) && MPAM3_EL3().TRAPLOWER == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else MPAM1_EL1() = X{64}(t); end; else Undefined(); end; elsif PSTATE.EL == EL3 then if ELIsInHost(EL2) then MPAM1_EL1() = X{64}(t); else Undefined(); end; end; 2026-03-26 20:27:25 2026-03_rel