<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<register_page>
  <registers>
  
    <register execution_state="AArch64" is_register="True" is_internal="True" is_stub_entry="False">
      <reg_short_name>MPAMBWIDR_EL1</reg_short_name>
        
        <reg_long_name>MPAM PE-side Bandwidth Controls ID Register</reg_long_name>



      
            <reg_condition otherwise="UNDEFINED">when FEAT_MPAM_PE_BW_CTRL is implemented</reg_condition>
      




          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Indicates the supported PE-side memory bandwidth parameter values.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>MPAM</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>MPAMBWIDR_EL1 is a 64-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="64">
  <text_before_fields/>
  <field id="fieldset_0-63_63" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>HAS_HW_SCALE</field_name>
    <field_msb>63</field_msb>
    <field_lsb>63</field_lsb>
    <rel_range>63</rel_range>
    <field_description order="before">
      <para>Indicates whether hardware support for auto-scaling of MPAMBWn_ELx.MAX, <register_link state="AArch64" id="AArch64-mpambwsm_el1.xml">MPAMBWSM_EL1</register_link>.MAX and <register_link state="AArch64" id="AArch64-mpambwcap_el2.xml">MPAMBWCAP_EL2</register_link>.CAP limits is available.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Hardware support for auto-scaling is not implemented.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Hardware support for auto-scaling is implemented.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-62_32" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>62</field_msb>
    <field_lsb>32</field_lsb>
    <rel_range>62:32</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-31_30" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>MAX_LIM</field_name>
    <field_msb>31</field_msb>
    <field_lsb>30</field_lsb>
    <rel_range>31:30</rel_range>
    <field_description order="before">
      <para>Indicates the implemented maximum bandwidth limit partitioning behaviors.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0b00</field_value>
        <field_value_description>
          <para>Both soft limit and hard limit behaviors are implemented.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b01</field_value>
        <field_value_description>
          <para>Soft limit behavior is implemented.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b10</field_value>
        <field_value_description>
          <para>Hard limit behavior is implemented.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b11</field_value>
        <field_value_description>
          <para>Reserved.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-29_6" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>29</field_msb>
    <field_lsb>6</field_lsb>
    <rel_range>29:6</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-5_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>BWA_WD</field_name>
    <field_msb>5</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>5:0</rel_range>
    <field_description order="before">
      <para>Indicates the number of implemented bits in the bandwidth allocation fields MPAMBWn_ELx.MAX, <register_link state="AArch64" id="AArch64-mpambwsm_el1.xml">MPAMBWSM_EL1</register_link>.MAX and <register_link state="AArch64" id="AArch64-mpambwcap_el2.xml">MPAMBWCAP_EL2</register_link>.CAP.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0b000001..0b010000</field_value>
        <field_value_description>
          <para>Number of implemented bits in the bandwidth allocation fields.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="64">
  <fieldat id="fieldset_0-63_63" msb="63" lsb="63"/>
  <fieldat id="fieldset_0-62_32" msb="62" lsb="32"/>
  <fieldat id="fieldset_0-31_30" msb="31" lsb="30"/>
  <fieldat id="fieldset_0-29_6" msb="29" lsb="6"/>
  <fieldat id="fieldset_0-5_0" msb="5" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    
        
        <access_mechanism accessor="MRS MPAMBWIDR_EL1" type="SystemAccessor">
            <encoding>
            <access_instruction>MRS &lt;Xt&gt;, MPAMBWIDR_EL1</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b000"/>
                
                <enc n="CRn" v="0b1010"/>
                
                <enc n="CRm" v="0b0100"/>
                
                <enc n="op2" v="0b101"/>
            </encoding>
            <access_permission>
                <ps name="MRS" sections="1" secttype="access_permission">
                <pstext>
if !IsFeatureImplemented(FEAT_MPAM_PE_BW_CTRL) then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; MPAMBW3_EL3().nTRAPLOWER == '0' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    elsif HaveEL(EL3) &amp;&amp; MPAMBW3_EL3().nTRAPLOWER == '0' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    elsif EL2Enabled() &amp;&amp; MPAMBW2_EL2().nTRAP_MPAMBWIDR_EL1 == '0' then
        AArch64_SystemAccessTrap(EL2, 0x18);
    else
        X{64}(t) = MPAMBWIDR_EL1();
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; MPAMBW3_EL3().nTRAPLOWER == '0' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    elsif HaveEL(EL3) &amp;&amp; MPAMBW3_EL3().nTRAPLOWER == '0' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        X{64}(t) = MPAMBWIDR_EL1();
    end;
elsif PSTATE.EL == EL3 then
    X{64}(t) = MPAMBWIDR_EL1();
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>