<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<register_page>
  <registers>
  
    <register execution_state="AArch64" is_register="True" is_internal="True" is_stub_entry="False">
      <reg_short_name>MPAMHCR_EL2</reg_short_name>
        
        <reg_long_name>MPAM Hypervisor Control Register (EL2)</reg_long_name>



      
            <reg_condition otherwise="UNDEFINED">when (FEAT_MPAMv1p0 is implemented or FEAT_MPAMv0p1 is implemented) and MPAMIDR_EL1.HAS_HCR == '1'</reg_condition>
      




          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Controls the PARTID virtualization features of MPAM.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>MPAM</reg_group>
      </reg_groups>
      <reg_configuration>
        
    
      <configuration_text>
        <para>This register has no effect if EL2 is not enabled in the current Security state.</para>
      </configuration_text>

      </reg_configuration>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>MPAMHCR_EL2 is a 64-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="64">
  <fields_condition>When FEAT_MPAMv0p1 is implemented or FEAT_MPAMv1p0 is implemented</fields_condition>
  <text_before_fields/>
  <field id="fieldset_0-63_32" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>63</field_msb>
    <field_lsb>32</field_lsb>
    <rel_range>63:32</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-31_31" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>TRAP_MPAMIDR_EL1</field_name>
    <field_msb>31</field_msb>
    <field_lsb>31</field_lsb>
    <rel_range>31</rel_range>
    <field_description order="before">
      <para>Trap accesses from EL1 to <register_link state="AArch64" id="AArch64-mpamidr_el1.xml">MPAMIDR_EL1</register_link> to EL2.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>This control does not cause any instructions to be trapped.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Direct accesses to <register_link state="AArch64" id="AArch64-mpamidr_el1.xml">MPAMIDR_EL1</register_link> from EL1 are trapped to EL2.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_conditions>
          <field_reset_condition condition="EL3 is not implemented">
            <field_reset>
              <field_reset_number>'1'</field_reset_number>
            </field_reset>
          </field_reset_condition>
          <field_reset_condition condition="EL3 is implemented">
            <field_reset>
              <field_reset_standard_text>AU</field_reset_standard_text>
            </field_reset>
          </field_reset_condition>
        </field_reset_conditions>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-30_9" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>30</field_msb>
    <field_lsb>9</field_lsb>
    <rel_range>30:9</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-8_8" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>GSTAPP_PLK</field_name>
    <field_msb>8</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>8</rel_range>
    <field_description order="before">
      <para>Make the PARTIDs at EL0 the same as the PARTIDs at EL1. When executing at EL0, EL2 is enabled, <register_link state="AArch64" id="AArch64-hcr_el2.xml">HCR_EL2</register_link>.TGE == 0 and GSTAPP_PLK = 1, <register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link> is used instead of <register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link> to generate MPAM labels for memory requests.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para><register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link> is used to generate MPAM labels when executing at EL0.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para><register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link> is used to generate MPAM labels when executing at EL0 with EL2 enabled and <register_link state="AArch64" id="AArch64-hcr_el2.xml">HCR_EL2</register_link>.TGE == 0. Otherwise <register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link> is used.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-7_2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>7</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>7:2</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-1_1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>EL1_VPMEN</field_name>
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>1</rel_range>
    <field_description order="before">
      <para>Enable virtualized identifiers in <register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link> when executing at EL1. This bit also enables virtualized identifiers when <register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link> is used to generate MPAM identifiers for memory requests at EL0 due to GSTAPP_PLK == 1.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para><register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link>.PARTID_I and <register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link>.PARTID_D are physical PARTIDs used to label memory system requests.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para><register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link>.PARTID_I and <register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link>.PARTID_D are virtual PARTIDs used to index the <xref linkend="#MPAMVPMn_ELx">MPAMVPMn_EL2</xref>.PhyPARTID fields to map the virtual PARTID into a physical PARTID to label memory system requests.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-0_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>EL0_VPMEN</field_name>
    <field_msb>0</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before"><para>Enable virtualized identifiers in <register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link> unless the Effective value of <register_link state="AArch64" id="AArch64-hcr_el2.xml">HCR_EL2</register_link>.{E2H, TGE} is {1, 1}.</para>
<para>When the Effective value of <register_link state="AArch64" id="AArch64-hcr_el2.xml">HCR_EL2</register_link>.{E2H, TGE} is {1, 1}, EL0_VPMEN is ignored and <register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link> identifiers are not virtualized.</para>
<para>When <register_link state="AArch64" id="AArch64-mpamhcr_el2.xml">MPAMHCR_EL2</register_link>.GSTAPP_PLK == 1 and <register_link state="AArch64" id="AArch64-hcr_el2.xml">HCR_EL2</register_link>.TGE == 0, <register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link> is used as the source of identifiers and the virtualization of identifiers in <register_link state="AArch64" id="AArch64-mpam1_el1.xml">MPAM1_EL1</register_link> is controlled by <register_link state="AArch64" id="AArch64-mpamhcr_el2.xml">MPAMHCR_EL2</register_link>.EL1_VPMEN.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para><register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link>.PARTID_I and <register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link>.PARTID_D are physical PARTIDs used to label memory system requests.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para><register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link>.PARTID_I and <register_link state="AArch64" id="AArch64-mpam0_el1.xml">MPAM0_EL1</register_link>.PARTID_D are virtual PARTIDs used to index the <xref linkend="#MPAMVPMn_ELx">MPAMVPMn_EL2</xref>.PhyPARTID fields to map the virtual PARTID into a physical PARTID to label memory system requests.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="64">
  <fields_condition>When FEAT_MPAMv0p1 is implemented or FEAT_MPAMv1p0 is implemented</fields_condition>
  <fieldat id="fieldset_0-63_32" msb="63" lsb="32"/>
  <fieldat id="fieldset_0-31_31" msb="31" lsb="31"/>
  <fieldat id="fieldset_0-30_9" msb="30" lsb="9"/>
  <fieldat id="fieldset_0-8_8" msb="8" lsb="8"/>
  <fieldat id="fieldset_0-7_2" msb="7" lsb="2"/>
  <fieldat id="fieldset_0-1_1" msb="1" lsb="1"/>
  <fieldat id="fieldset_0-0_0" msb="0" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    
        
        <access_mechanism accessor="MRS MPAMHCR_EL2" type="SystemAccessor">
            <encoding>
            <access_instruction>MRS &lt;Xt&gt;, MPAMHCR_EL2</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b100"/>
                
                <enc n="CRn" v="0b1010"/>
                
                <enc n="CRm" v="0b0100"/>
                
                <enc n="op2" v="0b000"/>
            </encoding>
            <access_permission>
                <ps name="MRS" sections="1" secttype="access_permission">
                <pstext>
if !((IsFeatureImplemented(FEAT_MPAMv1p0) || IsFeatureImplemented(FEAT_MPAMv0p1)) &amp;&amp; MPAMIDR_EL1().HAS_HCR == '1') then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if EffectiveHCR_EL2_NVx() IN {'1x1'} then
        X{64}(t) = NVMem(0x930);
    elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then
        if HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
            if EL3SDDUndef() then
                Undefined();
            else
                AArch64_SystemAccessTrap(EL3, 0x18);
            end;
        else
            AArch64_SystemAccessTrap(EL2, 0x18);
        end;
    else
        Undefined();
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        X{64}(t) = MPAMHCR_EL2();
    end;
elsif PSTATE.EL == EL3 then
    X{64}(t) = MPAMHCR_EL2();
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>
    
        
        <access_mechanism accessor="MSRregister MPAMHCR_EL2" type="SystemAccessor">
            <encoding>
            <access_instruction>MSR MPAMHCR_EL2, &lt;Xt&gt;</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b100"/>
                
                <enc n="CRn" v="0b1010"/>
                
                <enc n="CRm" v="0b0100"/>
                
                <enc n="op2" v="0b000"/>
            </encoding>
            <access_permission>
                <ps name="MSRregister" sections="1" secttype="access_permission">
                <pstext>
if !((IsFeatureImplemented(FEAT_MPAMv1p0) || IsFeatureImplemented(FEAT_MPAMv0p1)) &amp;&amp; MPAMIDR_EL1().HAS_HCR == '1') then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if EffectiveHCR_EL2_NVx() IN {'1x1'} then
        NVMem(0x930) = X{64}(t);
    elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then
        if HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
            if EL3SDDUndef() then
                Undefined();
            else
                AArch64_SystemAccessTrap(EL3, 0x18);
            end;
        else
            AArch64_SystemAccessTrap(EL2, 0x18);
        end;
    else
        Undefined();
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        MPAMHCR_EL2() = X{64}(t);
    end;
elsif PSTATE.EL == EL3 then
    MPAMHCR_EL2() = X{64}(t);
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>