<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<register_page>
  <registers>
  
    <register execution_state="AArch64" is_register="True" is_internal="True" is_stub_entry="False">
      <reg_short_name>MPAMVPMV_EL2</reg_short_name>
        
        <reg_long_name>MPAM Virtual Partition Mapping Valid Register</reg_long_name>



      
            <reg_condition otherwise="UNDEFINED">when (FEAT_MPAMv0p1 is implemented or FEAT_MPAMv1p0 is implemented) and MPAMIDR_EL1.HAS_HCR == '1'</reg_condition>
      




          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Valid bits for virtual PARTID mapping entries. Each bit m corresponds to virtual PARTID mapping entry m in the MPAMVPM&lt;n&gt;_EL2 registers where n = m &gt;&gt; 2.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>MPAM</reg_group>
      </reg_groups>
      <reg_configuration>
        
    
      <configuration_text>
        <para>This register has no effect if EL2 is not enabled in the current Security state.</para>
      </configuration_text>

      </reg_configuration>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>MPAMVPMV_EL2 is a 64-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="64">
  <text_before_fields/>
  <field id="fieldset_0-63_32" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>63</field_msb>
    <field_lsb>32</field_lsb>
    <rel_range>63:32</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-31_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>VPM_V&lt;m&gt;</field_name>
    <field_msb>31</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>31:0</rel_range>
    <field_description order="before">
      <para>Contains valid bit for virtual PARTID mapping entry corresponding to virtual PARTID&lt;m&gt;.</para>
    </field_description>
    <field_array_indexes index_variable="m" element_size="1" range_specifier="m">
      <field_array_index>
        <field_array_start>31</field_array_start>
        <field_array_end>0</field_array_end>
      </field_array_index>
    </field_array_indexes>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <field_access>
      <field_access_state>
        <field_access_level>When m &gt;= (UInt(MPAMIDR_EL1.VPMR_MAX) + 1) * 4</field_access_level>
        <field_access_type>
          <arm-defined-word>RES0</arm-defined-word>
        </field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="64">
  <fieldat id="fieldset_0-63_32" msb="63" lsb="32"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V31" msb="31" lsb="31"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V30" msb="30" lsb="30"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V29" msb="29" lsb="29"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V28" msb="28" lsb="28"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V27" msb="27" lsb="27"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V26" msb="26" lsb="26"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V25" msb="25" lsb="25"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V24" msb="24" lsb="24"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V23" msb="23" lsb="23"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V22" msb="22" lsb="22"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V21" msb="21" lsb="21"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V20" msb="20" lsb="20"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V19" msb="19" lsb="19"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V18" msb="18" lsb="18"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V17" msb="17" lsb="17"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V16" msb="16" lsb="16"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V15" msb="15" lsb="15"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V14" msb="14" lsb="14"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V13" msb="13" lsb="13"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V12" msb="12" lsb="12"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V11" msb="11" lsb="11"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V10" msb="10" lsb="10"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V9" msb="9" lsb="9"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V8" msb="8" lsb="8"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V7" msb="7" lsb="7"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V6" msb="6" lsb="6"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V5" msb="5" lsb="5"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V4" msb="4" lsb="4"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V3" msb="3" lsb="3"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V2" msb="2" lsb="2"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V1" msb="1" lsb="1"/>
  <fieldat id="fieldset_0-31_0" label="VPM_V0" msb="0" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    
        
        <access_mechanism accessor="MRS MPAMVPMV_EL2" type="SystemAccessor">
            <encoding>
            <access_instruction>MRS &lt;Xt&gt;, MPAMVPMV_EL2</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b100"/>
                
                <enc n="CRn" v="0b1010"/>
                
                <enc n="CRm" v="0b0100"/>
                
                <enc n="op2" v="0b001"/>
            </encoding>
            <access_permission>
                <ps name="MRS" sections="1" secttype="access_permission">
                <pstext>
if !((IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAMIDR_EL1().HAS_HCR == '1') then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if EffectiveHCR_EL2_NVx() IN {'1x1'} then
        X{64}(t) = NVMem(0x938);
    elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then
        if HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
            if EL3SDDUndef() then
                Undefined();
            else
                AArch64_SystemAccessTrap(EL3, 0x18);
            end;
        else
            AArch64_SystemAccessTrap(EL2, 0x18);
        end;
    else
        Undefined();
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        X{64}(t) = MPAMVPMV_EL2();
    end;
elsif PSTATE.EL == EL3 then
    X{64}(t) = MPAMVPMV_EL2();
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>
    
        
        <access_mechanism accessor="MSRregister MPAMVPMV_EL2" type="SystemAccessor">
            <encoding>
            <access_instruction>MSR MPAMVPMV_EL2, &lt;Xt&gt;</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b100"/>
                
                <enc n="CRn" v="0b1010"/>
                
                <enc n="CRm" v="0b0100"/>
                
                <enc n="op2" v="0b001"/>
            </encoding>
            <access_permission>
                <ps name="MSRregister" sections="1" secttype="access_permission">
                <pstext>
if !((IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAMIDR_EL1().HAS_HCR == '1') then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if EffectiveHCR_EL2_NVx() IN {'1x1'} then
        NVMem(0x938) = X{64}(t);
    elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then
        if HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
            if EL3SDDUndef() then
                Undefined();
            else
                AArch64_SystemAccessTrap(EL3, 0x18);
            end;
        else
            AArch64_SystemAccessTrap(EL2, 0x18);
        end;
    else
        Undefined();
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; (IsFeatureImplemented(FEAT_MPAMv0p1) || IsFeatureImplemented(FEAT_MPAMv1p0)) &amp;&amp; MPAM3_EL3().TRAPLOWER == '1' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        MPAMVPMV_EL2() = X{64}(t);
    end;
elsif PSTATE.EL == EL3 then
    MPAMVPMV_EL2() = X{64}(t);
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>