PMBLIMITR_EL1 Profiling Buffer Limit Address Register when FEAT_SPE is implemented Defines the upper limit for the profiling buffer, and enables the profiling buffer SPE PMBLIMITR_EL1 is a 64-bit register. LIMIT 63 12 63:12 Limit address. PMBLIMITR_EL1.LIMIT:Zeros(12) is the address of the first byte in memory after the last byte in the profiling buffer. If the smallest implemented translation granule is not 4KB, then bits[N-1:12] are RES0, where N is the IMPLEMENTATION DEFINED value, Log₂(smallest implemented translation granule). AU 11 8 11:8 Reserved, RES0. nVM 7 7 0 Address mode. If the Effective value of PMSCR_EL2.EnVM is 0, then the PE ignores the value of this field, and the Profiling Buffer pointers are always virtual addresses. 0b0 The Profiling Buffer pointers are virtual addresses. 0b1 The Profiling Buffer pointers are: Physical address in the owning security state if the owning translation regime has no stage 2 translation. Intermediate physical addresses in the owning security state if the owning translation regime has stage 2 translations. AU RW When FEAT_SPE_nVM is implemented 7 7 7 Reserved, RES0. Otherwise 6 6 6 Reserved, RES0. PMFZ 5 5 0 Freeze PMU on SPE event. Stop PMU event counters when PMBSR_EL1.S == 1. The PMU event counters affected by this control is controlled by PMCR_EL0.FZS and, if EL2 is implemented, MDCR_EL2.HPMFZS. See the descriptions of these control bits for more information. 0b0 Do not freeze PMU event counters on Statistical Profiling Buffer Management event. 0b1 Freeze PMU event counters on Statistical Profiling Buffer Management event. AU When FEAT_SPEv1p2 is implemented 5 5 5 Reserved, RES0. Otherwise 4 3 4:3 Reserved, RES0. FM 2 1 2:1 Fill mode. All other values are reserved. 0b00 Fill mode. Stop collection and raise maintenance interrupt on buffer fill. 0b10 Discard mode. All output is discarded. When FEAT_SPEv1p2 is implemented AU E 0 0 0 Profiling Buffer enable 0b0 All output is discarded. 0b1 Profiling buffer enabled. '0' MRS <Xt>, PMBLIMITR_EL1 if !IsFeatureImplemented(FEAT_SPE) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && CheckMDCR_EL3_NSPBTrap() then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGRTR_EL2().PMBLIMITR_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && MDCR_EL2().E2PB IN {'x0'} then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && CheckMDCR_EL3_NSPBTrap() then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EffectiveHCR_EL2_NVx() IN {'1x1'} then X{64}(t) = NVMem(0x800); else X{64}(t) = PMBLIMITR_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && CheckMDCR_EL3_NSPBTrap() then Undefined(); elsif HaveEL(EL3) && CheckMDCR_EL3_NSPBTrap() then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = PMBLIMITR_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = PMBLIMITR_EL1(); end; MSR PMBLIMITR_EL1, <Xt> if !IsFeatureImplemented(FEAT_SPE) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && CheckMDCR_EL3_NSPBTrap() then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT) && (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') && HDFGWTR_EL2().PMBLIMITR_EL1 == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && MDCR_EL2().E2PB IN {'x0'} then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && CheckMDCR_EL3_NSPBTrap() then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif EffectiveHCR_EL2_NVx() IN {'1x1'} then NVMem(0x800) = X{64}(t); else PMBLIMITR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && CheckMDCR_EL3_NSPBTrap() then Undefined(); elsif HaveEL(EL3) && CheckMDCR_EL3_NSPBTrap() then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else PMBLIMITR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then PMBLIMITR_EL1() = X{64}(t); end; 2026-03-26 20:27:25 2026-03_rel