PMECR_EL1 Performance Monitors Extended Control Register (EL1) when (FEAT_EBEP is implemented or FEAT_PMUv3_SS is implemented) and FEAT_AA64 is implemented Provides EL1 configuration options for the Performance Monitors. PMU PMECR_EL1 is a 64-bit register. 63 5 63:5 Reserved, RES0. SSE 4 3 1:0 Snapshot Enable. Controls the generation of Capture events. All other values are reserved. 0b00 Capture events are disabled. 0b10 Capture events are enabled and prohibited. 0b11 Capture events are enabled and allowed. '00' AU When FEAT_PMUv3_SS is implemented 4 3 4:3 Reserved, RES0. Otherwise KPME 2 2 0 Local (Kernel) PMU Exception Enable. Enables PMU Profiling exceptions taken to the current Exception level. 0b0 PMU Profiling exceptions taken to the current Exception level are disabled. 0b1 PMU Profiling exceptions taken to the current Exception level are not affected by this field. AU When FEAT_EBEP is implemented 2 2 2 Reserved, RES0. Otherwise PMEE 1 0 1:0 Performance Monitors Exception Enable. Controls the generation of the PMUIRQ signal and the PMU Profiling exception at EL0 and EL1. All other values are reserved. This field is ignored by the PE when any of the following are true: All of the following are true: EL3 is implemented. MDCR_EL3.PMEE != 0b01. All of the following are true: EL2 is implemented and enabled in the current Security State. MDCR_EL2.PMEE != 0b01. 0b00 The PMUIRQ signal is asserted on a PMU overflow, and the PMU Profiling exception is disabled. 0b11 The PMUIRQ signal is deasserted, and the PMU Profiling exception is enabled. '00' AU When FEAT_EBEP is implemented 1 0 1:0 Reserved, RES0. Otherwise MRS <Xt>, PMECR_EL1 if !((IsFeatureImplemented(FEAT_EBEP) || IsFeatureImplemented(FEAT_PMUv3_SS)) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().EnPM2 == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TPM == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT2) && ((HaveEL(EL3) && SCR_EL3().FGTEn2 == '0') || HDFGRTR2_EL2().nPMECR_EL1 == '0') then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && MDCR_EL2().TPM == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3().EnPM2 == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = PMECR_EL1(); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().EnPM2 == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TPM == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().EnPM2 == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else X{64}(t) = PMECR_EL1(); end; elsif PSTATE.EL == EL3 then X{64}(t) = PMECR_EL1(); end; MSR PMECR_EL1, <Xt> if !((IsFeatureImplemented(FEAT_EBEP) || IsFeatureImplemented(FEAT_PMUv3_SS)) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().EnPM2 == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TPM == '1' then Undefined(); elsif EL2Enabled() && IsFeatureImplemented(FEAT_FGT2) && ((HaveEL(EL3) && SCR_EL3().FGTEn2 == '0') || HDFGWTR2_EL2().nPMECR_EL1 == '0') then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && MDCR_EL2().TPM == '1' then AArch64_SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && MDCR_EL3().EnPM2 == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else PMECR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().EnPM2 == '0' then Undefined(); elsif HaveEL(EL3) && EL3SDDUndefPriority() && MDCR_EL3().TPM == '1' then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().EnPM2 == '0' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; elsif HaveEL(EL3) && MDCR_EL3().TPM == '1' then if EL3SDDUndef() then Undefined(); else AArch64_SystemAccessTrap(EL3, 0x18); end; else PMECR_EL1() = X{64}(t); end; elsif PSTATE.EL == EL3 then PMECR_EL1() = X{64}(t); end; 2026-03-26 20:27:25 2026-03_rel