<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
<!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<!--The data contained in this document is preliminary and subject to change or correction following further review. -->
<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register execution_state="AArch64" is_register="True" is_internal="True" is_stub_entry="False">
      <reg_short_name>PMSEVFR_EL1</reg_short_name>
        
        <reg_long_name>Sampling Event Filter Register</reg_long_name>



      
            <reg_condition otherwise="UNDEFINED">when FEAT_SPE is implemented</reg_condition>
      




          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Controls sample filtering by events. The overall filter is the logical AND of these filters. For example, if PMSEVFR_EL1.E[3] and PMSEVFR_EL1.E[5] are both set to 1, only samples that have both event 3 (Level 1 unified or data cache refill) and event 5 (TLB walk) set to 1 are recorded.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>SPE</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>PMSEVFR_EL1 is a 64-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="64">
  <text_before_fields/>
  <field id="fieldset_0-63_63-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[63]</field_name>
    <field_msb>63</field_msb>
    <field_lsb>63</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 63.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[63] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[63] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 63 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 63 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 63 is implemented and filtering on event 63 is supported</fields_condition>
  </field>
  <field id="fieldset_0-63_63-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>63</field_msb>
    <field_lsb>63</field_lsb>
    <rel_range>63</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-62_62-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[62]</field_name>
    <field_msb>62</field_msb>
    <field_lsb>62</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 62.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[62] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[62] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 62 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 62 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 62 is implemented and filtering on event 62 is supported</fields_condition>
  </field>
  <field id="fieldset_0-62_62-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>62</field_msb>
    <field_lsb>62</field_lsb>
    <rel_range>62</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-61_61-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[61]</field_name>
    <field_msb>61</field_msb>
    <field_lsb>61</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 61.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[61] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[61] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 61 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 61 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 61 is implemented and filtering on event 61 is supported</fields_condition>
  </field>
  <field id="fieldset_0-61_61-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>61</field_msb>
    <field_lsb>61</field_lsb>
    <rel_range>61</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-60_60-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[60]</field_name>
    <field_msb>60</field_msb>
    <field_lsb>60</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 60.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[60] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[60] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 60 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 60 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 60 is implemented and filtering on event 60 is supported</fields_condition>
  </field>
  <field id="fieldset_0-60_60-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>60</field_msb>
    <field_lsb>60</field_lsb>
    <rel_range>60</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-59_59-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[59]</field_name>
    <field_msb>59</field_msb>
    <field_lsb>59</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 59.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[59] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[59] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 59 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 59 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 59 is implemented and filtering on event 59 is supported</fields_condition>
  </field>
  <field id="fieldset_0-59_59-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>59</field_msb>
    <field_lsb>59</field_lsb>
    <rel_range>59</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-58_58-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[58]</field_name>
    <field_msb>58</field_msb>
    <field_lsb>58</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 58.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[58] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[58] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 58 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 58 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 58 is implemented and filtering on event 58 is supported</fields_condition>
  </field>
  <field id="fieldset_0-58_58-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>58</field_msb>
    <field_lsb>58</field_lsb>
    <rel_range>58</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-57_57-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[57]</field_name>
    <field_msb>57</field_msb>
    <field_lsb>57</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 57.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[57] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[57] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 57 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 57 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 57 is implemented and filtering on event 57 is supported</fields_condition>
  </field>
  <field id="fieldset_0-57_57-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>57</field_msb>
    <field_lsb>57</field_lsb>
    <rel_range>57</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-56_56-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[56]</field_name>
    <field_msb>56</field_msb>
    <field_lsb>56</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 56.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[56] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[56] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 56 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 56 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 56 is implemented and filtering on event 56 is supported</fields_condition>
  </field>
  <field id="fieldset_0-56_56-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>56</field_msb>
    <field_lsb>56</field_lsb>
    <rel_range>56</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-55_55-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[55]</field_name>
    <field_msb>55</field_msb>
    <field_lsb>55</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 55.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[55] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[55] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 55 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 55 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 55 is implemented and filtering on event 55 is supported</fields_condition>
  </field>
  <field id="fieldset_0-55_55-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>55</field_msb>
    <field_lsb>55</field_lsb>
    <rel_range>55</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-54_54-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[54]</field_name>
    <field_msb>54</field_msb>
    <field_lsb>54</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 54.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[54] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[54] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 54 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 54 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 54 is implemented and filtering on event 54 is supported</fields_condition>
  </field>
  <field id="fieldset_0-54_54-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>54</field_msb>
    <field_lsb>54</field_lsb>
    <rel_range>54</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-53_53-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[53]</field_name>
    <field_msb>53</field_msb>
    <field_lsb>53</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 53.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[53] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[53] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 53 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 53 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 53 is implemented and filtering on event 53 is supported</fields_condition>
  </field>
  <field id="fieldset_0-53_53-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>53</field_msb>
    <field_lsb>53</field_lsb>
    <rel_range>53</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-52_52-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[52]</field_name>
    <field_msb>52</field_msb>
    <field_lsb>52</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 52.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[52] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[52] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 52 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 52 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 52 is implemented and filtering on event 52 is supported</fields_condition>
  </field>
  <field id="fieldset_0-52_52-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>52</field_msb>
    <field_lsb>52</field_lsb>
    <rel_range>52</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-51_51-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[51]</field_name>
    <field_msb>51</field_msb>
    <field_lsb>51</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 51.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[51] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[51] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 51 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 51 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 51 is implemented and filtering on event 51 is supported</fields_condition>
  </field>
  <field id="fieldset_0-51_51-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>51</field_msb>
    <field_lsb>51</field_lsb>
    <rel_range>51</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-50_50-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[50]</field_name>
    <field_msb>50</field_msb>
    <field_lsb>50</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 50.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[50] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[50] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 50 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 50 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 50 is implemented and filtering on event 50 is supported</fields_condition>
  </field>
  <field id="fieldset_0-50_50-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>50</field_msb>
    <field_lsb>50</field_lsb>
    <rel_range>50</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-49_49-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[49]</field_name>
    <field_msb>49</field_msb>
    <field_lsb>49</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 49.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[49] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[49] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 49 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 49 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 49 is implemented and filtering on event 49 is supported</fields_condition>
  </field>
  <field id="fieldset_0-49_49-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>49</field_msb>
    <field_lsb>49</field_lsb>
    <rel_range>49</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-48_48-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[48]</field_name>
    <field_msb>48</field_msb>
    <field_lsb>48</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 48.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[48] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[48] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 48 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 48 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 48 is implemented and filtering on event 48 is supported</fields_condition>
  </field>
  <field id="fieldset_0-48_48-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>48</field_msb>
    <field_lsb>48</field_lsb>
    <rel_range>48</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-47_32" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>47</field_msb>
    <field_lsb>32</field_lsb>
    <rel_range>47:32</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
  </field>
  <field id="fieldset_0-31_31-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[31]</field_name>
    <field_msb>31</field_msb>
    <field_lsb>31</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 31.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[31] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[31] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 31 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 31 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 31 is implemented, and filtering on event 31 is supported</fields_condition>
  </field>
  <field id="fieldset_0-31_31-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>31</field_msb>
    <field_lsb>31</field_lsb>
    <rel_range>31</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-30_30-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[30]</field_name>
    <field_msb>30</field_msb>
    <field_lsb>30</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 30.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[30] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[30] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 30 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 30 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 30 is implemented, and filtering on event 30 is supported</fields_condition>
  </field>
  <field id="fieldset_0-30_30-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>30</field_msb>
    <field_lsb>30</field_lsb>
    <rel_range>30</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-29_29-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[29]</field_name>
    <field_msb>29</field_msb>
    <field_lsb>29</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 29.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[29] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[29] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 29 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 29 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 29 is implemented, and filtering on event 29 is supported</fields_condition>
  </field>
  <field id="fieldset_0-29_29-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>29</field_msb>
    <field_lsb>29</field_lsb>
    <rel_range>29</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-28_28-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[28]</field_name>
    <field_msb>28</field_msb>
    <field_lsb>28</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 28.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[28] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[28] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 28 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 28 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 28 is implemented, and filtering on event 28 is supported</fields_condition>
  </field>
  <field id="fieldset_0-28_28-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>28</field_msb>
    <field_lsb>28</field_lsb>
    <rel_range>28</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-27_27-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[27]</field_name>
    <field_msb>27</field_msb>
    <field_lsb>27</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 27.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[27] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[27] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 27 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 27 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 27 is implemented, and filtering on event 27 is supported</fields_condition>
  </field>
  <field id="fieldset_0-27_27-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>27</field_msb>
    <field_lsb>27</field_lsb>
    <rel_range>27</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-26_26-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[26]</field_name>
    <field_msb>26</field_msb>
    <field_lsb>26</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 26.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[26] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[26] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 26 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 26 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 26 is implemented, and filtering on event 26 is supported</fields_condition>
  </field>
  <field id="fieldset_0-26_26-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>26</field_msb>
    <field_lsb>26</field_lsb>
    <rel_range>26</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-25_25-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[25]</field_name>
    <field_msb>25</field_msb>
    <field_lsb>25</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
SMCU or other shared resource operation
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[25] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[25] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>SMCU or other shared resource operation
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
SMCU or other shared resource operation
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When (FEAT_SPE_SME is implemented or FEAT_SPEv1p5 is implemented) and event 25 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-25_25-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[25]</field_name>
    <field_msb>25</field_msb>
    <field_lsb>25</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 25.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[25] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[25] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 25 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 25 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 25 is implemented, and filtering on event 25 is supported</fields_condition>
  </field>
  <field id="fieldset_0-25_25-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>25</field_msb>
    <field_lsb>25</field_lsb>
    <rel_range>25</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-24_24-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[24]</field_name>
    <field_msb>24</field_msb>
    <field_lsb>24</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Streaming SVE mode
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[24] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[24] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Streaming SVE mode
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Streaming SVE mode
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPE_SME is implemented</fields_condition>
  </field>
  <field id="fieldset_0-24_24-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[24]</field_name>
    <field_msb>24</field_msb>
    <field_lsb>24</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 24.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[24] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[24] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 24 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 24 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is not implemented, event 24 is implemented, and filtering on event 24 is supported</fields_condition>
  </field>
  <field id="fieldset_0-24_24-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>24</field_msb>
    <field_lsb>24</field_lsb>
    <rel_range>24</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-23_23-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[23]</field_name>
    <field_msb>23</field_msb>
    <field_lsb>23</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Data snooped
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[23] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[23] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Data snooped
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Data snooped
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is implemented and event 23 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-23_23-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>23</field_msb>
    <field_lsb>23</field_lsb>
    <rel_range>23</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-22_22-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[22]</field_name>
    <field_msb>22</field_msb>
    <field_lsb>22</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Recently fetched
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[22] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[22] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Recently fetched
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Recently fetched
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is implemented and event 22 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-22_22-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>22</field_msb>
    <field_lsb>22</field_lsb>
    <rel_range>22</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-21_21-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[21]</field_name>
    <field_msb>21</field_msb>
    <field_lsb>21</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Cache data modified
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[21] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[21] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Cache data modified
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Cache data modified
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is implemented and event 21 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-21_21-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>21</field_msb>
    <field_lsb>21</field_lsb>
    <rel_range>21</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-20_20-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[20]</field_name>
    <field_msb>20</field_msb>
    <field_lsb>20</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Level 2 data cache miss
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[20] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[20] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Level 2 data cache miss
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Level 2 data cache miss
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is implemented and event 20 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-20_20-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>20</field_msb>
    <field_lsb>20</field_lsb>
    <rel_range>20</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-19_19-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[19]</field_name>
    <field_msb>19</field_msb>
    <field_lsb>19</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Level 2 data cache access
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[19] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[19] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Level 2 data cache access
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Level 2 data cache access
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is implemented and event 19 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-19_19-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>19</field_msb>
    <field_lsb>19</field_lsb>
    <rel_range>19</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-18_18-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[18]</field_name>
    <field_msb>18</field_msb>
    <field_lsb>18</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Empty predicate
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[18] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[18] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Empty predicate
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Empty predicate
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p1 is implemented and (FEAT_SVE is implemented or FEAT_SME is implemented)</fields_condition>
  </field>
  <field id="fieldset_0-18_18-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>18</field_msb>
    <field_lsb>18</field_lsb>
    <rel_range>18</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-17_17-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[17]</field_name>
    <field_msb>17</field_msb>
    <field_lsb>17</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Partial or empty predicate
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[17] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[17] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Partial or empty predicate
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Partial or empty predicate
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p1 is implemented and (FEAT_SVE is implemented or FEAT_SME is implemented)</fields_condition>
  </field>
  <field id="fieldset_0-17_17-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>17</field_msb>
    <field_lsb>17</field_lsb>
    <rel_range>17</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-16_16" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>16</field_msb>
    <field_lsb>16</field_lsb>
    <rel_range>16</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
  </field>
  <field id="fieldset_0-15_15-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[15]</field_name>
    <field_msb>15</field_msb>
    <field_lsb>15</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 15.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[15] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[15] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 15 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 15 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 15 is implemented and filtering on event 15 is supported</fields_condition>
  </field>
  <field id="fieldset_0-15_15-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>15</field_msb>
    <field_lsb>15</field_lsb>
    <rel_range>15</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-14_14-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[14]</field_name>
    <field_msb>14</field_msb>
    <field_lsb>14</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 14.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[14] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[14] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 14 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 14 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 14 is implemented and filtering on event 14 is supported</fields_condition>
  </field>
  <field id="fieldset_0-14_14-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>14</field_msb>
    <field_lsb>14</field_lsb>
    <rel_range>14</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-13_13-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[13]</field_name>
    <field_msb>13</field_msb>
    <field_lsb>13</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 13.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[13] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[13] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 13 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 13 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 13 is implemented and filtering on event 13 is supported</fields_condition>
  </field>
  <field id="fieldset_0-13_13-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>13</field_msb>
    <field_lsb>13</field_lsb>
    <rel_range>13</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-12_12-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[12]</field_name>
    <field_msb>12</field_msb>
    <field_lsb>12</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event 12.</para>
    </field_description>
    <field_description order="after"><para>An <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> event might be recorded as a multi-bit field. In this case, the corresponding bits of PMSEVFR_EL1 define an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> filter for the event.</para>
<para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[12] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[12] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Event 12 is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have event 12 == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When event 12 is implemented and filtering on event 12 is supported</fields_condition>
  </field>
  <field id="fieldset_0-12_12-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>12</field_msb>
    <field_lsb>12</field_lsb>
    <rel_range>12</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-11_11-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[11]</field_name>
    <field_msb>11</field_msb>
    <field_lsb>11</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Misalignment
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[11] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[11] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Misalignment
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Misalignment
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p1 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-11_11-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>11</field_msb>
    <field_lsb>11</field_lsb>
    <rel_range>11</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-10_10-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[10]</field_name>
    <field_msb>10</field_msb>
    <field_lsb>10</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Remote access
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[10] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[10] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Remote access
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Remote access
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When (FEAT_SPEv1p4 is implemented or filtering on event 10 is optionally supported) and event 10 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-10_10-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>10</field_msb>
    <field_lsb>10</field_lsb>
    <rel_range>10</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-9_9-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[9]</field_name>
    <field_msb>9</field_msb>
    <field_lsb>9</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Last Level cache miss
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[9] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[9] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Last Level cache miss
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Last Level cache miss
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When (FEAT_SPEv1p4 is implemented or filtering on event 9 is optionally supported) and event 9 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-9_9-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>9</field_msb>
    <field_lsb>9</field_lsb>
    <rel_range>9</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-8_8-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[8]</field_name>
    <field_msb>8</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Last Level cache access
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[8] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[8] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Last Level cache access
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Last Level cache access
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When (FEAT_SPEv1p4 is implemented or filtering on event 8 is optionally supported) and event 8 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-8_8-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>8</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>8</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-7_7" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>E[7]</field_name>
    <field_msb>7</field_msb>
    <field_lsb>7</field_lsb>
    <rel_range>7</rel_range>
    <field_description order="before">
      <para>Filter on 
Mispredicted
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[7] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[7] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Mispredicted
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Mispredicted
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-6_6-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[6]</field_name>
    <field_msb>6</field_msb>
    <field_lsb>6</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Not taken
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[6] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[6] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Not taken
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Not taken
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPE_FnE is implemented</fields_condition>
  </field>
  <field id="fieldset_0-6_6-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>6</field_msb>
    <field_lsb>6</field_lsb>
    <rel_range>6</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-5_5" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>E[5]</field_name>
    <field_msb>5</field_msb>
    <field_lsb>5</field_lsb>
    <rel_range>5</rel_range>
    <field_description order="before">
      <para>Filter on 
TLB walk
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[5] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[5] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>TLB walk
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
TLB walk
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-4_4-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[4]</field_name>
    <field_msb>4</field_msb>
    <field_lsb>4</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
TLB access
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[4] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[4] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>TLB access
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
TLB access
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is implemented or filtering on event 4 is optionally supported</fields_condition>
  </field>
  <field id="fieldset_0-4_4-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>4</field_msb>
    <field_lsb>4</field_lsb>
    <rel_range>4</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-3_3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>E[3]</field_name>
    <field_msb>3</field_msb>
    <field_lsb>3</field_lsb>
    <rel_range>3</rel_range>
    <field_description order="before">
      <para>Filter on 
Level 1 data cache refill or miss
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[3] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[3] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Level 1 data cache refill or miss
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Level 1 data cache refill or miss
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-2_2-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RAZ/WI">
    <field_name>E[2]</field_name>
    <field_msb>2</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Level 1 data cache access
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[2] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[2] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Level 1 data cache access
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Level 1 data cache access
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_SPEv1p4 is implemented or filtering on event 2 is optionally supported</fields_condition>
  </field>
  <field id="fieldset_0-2_2-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>2</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>2</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-1_1-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="UNKNOWN">
    <field_name>E[1]</field_name>
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Filter on 
Architecturally retired
 event.</para>
    </field_description>
    <field_description order="after"><para>If <xref linkend="#FEAT_SPE_FnE">FEAT_SPE_FnE</xref> is implemented, <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FnE is 1, PMSFCR_EL1.FE is 1, PMSEVFR_EL1.E[1] is 1, and <register_link state="AArch64" id="AArch64-pmsnevfr_el1.xml">PMSNEVFR_EL1</register_link>.E[1] is 1, then, for each sampled operation, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the sample is discarded, and it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the SAMPLE_FEED_EVENT PMU event is generated.</para>
<para>This field is ignored by the PE when <register_link state="AArch64" id="AArch64-pmsfcr_el1.xml">PMSFCR_EL1</register_link>.FE is 0.</para>
<para>If the PE does not support the sampling of speculative instructions, or always discards the sample record for speculative instructions, this bit reads as an <arm-defined-word>UNKNOWN</arm-defined-word> value and the PE ignores its value.</para></field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Architecturally retired
 event is ignored.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Do not record samples that have the 
Architecturally retired
 event == 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
    <fields_condition>When the PE supports sampling of speculative instructions</fields_condition>
  </field>
  <field id="fieldset_0-1_1-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="UNKNOWN">
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>1</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>UNKNOWN</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-0_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RAZ/WI">
    <field_msb>0</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, RAZ/WI.</para>
    </field_description>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="64">
  <fieldat id="fieldset_0-63_63-1" msb="63" lsb="63"/>
  <fieldat id="fieldset_0-62_62-1" msb="62" lsb="62"/>
  <fieldat id="fieldset_0-61_61-1" msb="61" lsb="61"/>
  <fieldat id="fieldset_0-60_60-1" msb="60" lsb="60"/>
  <fieldat id="fieldset_0-59_59-1" msb="59" lsb="59"/>
  <fieldat id="fieldset_0-58_58-1" msb="58" lsb="58"/>
  <fieldat id="fieldset_0-57_57-1" msb="57" lsb="57"/>
  <fieldat id="fieldset_0-56_56-1" msb="56" lsb="56"/>
  <fieldat id="fieldset_0-55_55-1" msb="55" lsb="55"/>
  <fieldat id="fieldset_0-54_54-1" msb="54" lsb="54"/>
  <fieldat id="fieldset_0-53_53-1" msb="53" lsb="53"/>
  <fieldat id="fieldset_0-52_52-1" msb="52" lsb="52"/>
  <fieldat id="fieldset_0-51_51-1" msb="51" lsb="51"/>
  <fieldat id="fieldset_0-50_50-1" msb="50" lsb="50"/>
  <fieldat id="fieldset_0-49_49-1" msb="49" lsb="49"/>
  <fieldat id="fieldset_0-48_48-1" msb="48" lsb="48"/>
  <fieldat id="fieldset_0-47_32" msb="47" lsb="32"/>
  <fieldat id="fieldset_0-31_31-1" msb="31" lsb="31"/>
  <fieldat id="fieldset_0-30_30-1" msb="30" lsb="30"/>
  <fieldat id="fieldset_0-29_29-1" msb="29" lsb="29"/>
  <fieldat id="fieldset_0-28_28-1" msb="28" lsb="28"/>
  <fieldat id="fieldset_0-27_27-1" msb="27" lsb="27"/>
  <fieldat id="fieldset_0-26_26-1" msb="26" lsb="26"/>
  <fieldat id="fieldset_0-25_25-1" msb="25" lsb="25"/>
  <fieldat id="fieldset_0-24_24-1" msb="24" lsb="24"/>
  <fieldat id="fieldset_0-23_23-1" msb="23" lsb="23"/>
  <fieldat id="fieldset_0-22_22-1" msb="22" lsb="22"/>
  <fieldat id="fieldset_0-21_21-1" msb="21" lsb="21"/>
  <fieldat id="fieldset_0-20_20-1" msb="20" lsb="20"/>
  <fieldat id="fieldset_0-19_19-1" msb="19" lsb="19"/>
  <fieldat id="fieldset_0-18_18-1" msb="18" lsb="18"/>
  <fieldat id="fieldset_0-17_17-1" msb="17" lsb="17"/>
  <fieldat id="fieldset_0-16_16" msb="16" lsb="16"/>
  <fieldat id="fieldset_0-15_15-1" msb="15" lsb="15"/>
  <fieldat id="fieldset_0-14_14-1" msb="14" lsb="14"/>
  <fieldat id="fieldset_0-13_13-1" msb="13" lsb="13"/>
  <fieldat id="fieldset_0-12_12-1" msb="12" lsb="12"/>
  <fieldat id="fieldset_0-11_11-1" msb="11" lsb="11"/>
  <fieldat id="fieldset_0-10_10-1" msb="10" lsb="10"/>
  <fieldat id="fieldset_0-9_9-1" msb="9" lsb="9"/>
  <fieldat id="fieldset_0-8_8-1" msb="8" lsb="8"/>
  <fieldat id="fieldset_0-7_7" msb="7" lsb="7"/>
  <fieldat id="fieldset_0-6_6-1" msb="6" lsb="6"/>
  <fieldat id="fieldset_0-5_5" msb="5" lsb="5"/>
  <fieldat id="fieldset_0-4_4-1" msb="4" lsb="4"/>
  <fieldat id="fieldset_0-3_3" msb="3" lsb="3"/>
  <fieldat id="fieldset_0-2_2-1" msb="2" lsb="2"/>
  <fieldat id="fieldset_0-1_1-1" msb="1" lsb="1"/>
  <fieldat id="fieldset_0-0_0" msb="0" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    
        
        <access_mechanism accessor="MRS PMSEVFR_EL1" type="SystemAccessor">
            <encoding>
            <access_instruction>MRS &lt;Xt&gt;, PMSEVFR_EL1</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b000"/>
                
                <enc n="CRn" v="0b1001"/>
                
                <enc n="CRm" v="0b1001"/>
                
                <enc n="op2" v="0b101"/>
            </encoding>
            <access_permission>
                <ps name="MRS" sections="1" secttype="access_permission">
                <pstext>
if !IsFeatureImplemented(FEAT_SPE) then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        Undefined();
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_FGT) &amp;&amp; (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') &amp;&amp; HDFGRTR_EL2().PMSEVFR_EL1 == '1' then
        AArch64_SystemAccessTrap(EL2, 0x18);
    elsif EL2Enabled() &amp;&amp; MDCR_EL2().TPMS == '1' then
        AArch64_SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    elsif EffectiveHCR_EL2_NVx() IN {'1x1'} then
        X{64}(t) = NVMem(0x830);
    else
        X{64}(t) = PMSEVFR_EL1();
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        X{64}(t) = PMSEVFR_EL1();
    end;
elsif PSTATE.EL == EL3 then
    X{64}(t) = PMSEVFR_EL1();
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>
    
        
        <access_mechanism accessor="MSRregister PMSEVFR_EL1" type="SystemAccessor">
            <encoding>
            <access_instruction>MSR PMSEVFR_EL1, &lt;Xt&gt;</access_instruction>
                
                <enc n="op0" v="0b11"/>
                
                <enc n="op1" v="0b000"/>
                
                <enc n="CRn" v="0b1001"/>
                
                <enc n="CRm" v="0b1001"/>
                
                <enc n="op2" v="0b101"/>
            </encoding>
            <access_permission>
                <ps name="MSRregister" sections="1" secttype="access_permission">
                <pstext>
if !IsFeatureImplemented(FEAT_SPE) then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        Undefined();
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_FGT) &amp;&amp; (!HaveEL(EL3) || SCR_EL3().FGTEn == '1') &amp;&amp; HDFGWTR_EL2().PMSEVFR_EL1 == '1' then
        AArch64_SystemAccessTrap(EL2, 0x18);
    elsif EL2Enabled() &amp;&amp; MDCR_EL2().TPMS == '1' then
        AArch64_SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    elsif EffectiveHCR_EL2_NVx() IN {'1x1'} then
        NVMem(0x830) = X{64}(t);
    else
        PMSEVFR_EL1() = X{64}(t);
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; CheckMDCR_EL3_NSPBTrap() then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        PMSEVFR_EL1() = X{64}(t);
    end;
elsif PSTATE.EL == EL3 then
    PMSEVFR_EL1() = X{64}(t);
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>