<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<register_page>
  <registers>
  
    <register execution_state="AArch64" is_register="True" is_internal="True" is_stub_entry="False">
      <reg_short_name>SPMDEVAFF_EL1</reg_short_name>
        
        <reg_long_name>System Performance Monitors Device Affinity Register</reg_long_name>



      
            <reg_condition otherwise="UNDEFINED">when FEAT_SPMU is implemented and FEAT_AA64 is implemented</reg_condition>
      




          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>For additional information, see the CoreSight Architecture Specification.</para>

      </purpose_text>
      <purpose_text>
        <para>For a System PMU that has affinity with a single PE or a group of PEs, SPMDEVAFF_EL1 is a copy of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link> or part of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>:</para>

      </purpose_text>
      <purpose_text>
        <list type="unordered">
<listitem><content>If the System PMU has affinity with a single PE, then the affinity level is 0 and  SPMDEVAFF_EL1 reads the same value as <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>, and SPMDEVAFF_EL1.F0V reads-as-one to indicate affinity level 0.</content>
</listitem><listitem><content>If the System PMU has affinity with a group of PEs, then the affinity level is 1, 2, or 3, parts of SPMDEVAFF_EL1 reads the same value as parts of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>, and the rest of SPMDEVAFF_EL1 indicates the level.</content>
</listitem></list>

      </purpose_text>
      <purpose_text>
        <para>For example, if the group of PEs is a subset of the PEs at affinity level 1, then all of the following are true:</para>

      </purpose_text>
      <purpose_text>
        <list type="unordered">
<listitem><content>All the PEs in the group have the same values in <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.{Aff3,Aff2}, and these values are equal to SPMDEVAFF_EL1.{Aff3,Aff2}.</content>
</listitem><listitem><content>SPMDEVAFF_EL1.Aff1 is nonzero and not <hexnumber>0x80</hexnumber>, and SPMDEVAFF_EL1.{Aff0,F0V} read-as-zero, to indicate at least affinity level 1. The subset of PEs at level 1 that the System PMU has affinity with is indicated by the least-significant set bit in SPMDEVAFF_EL1.Aff1. In this example, if SPMDEVAFF_EL1.Aff1[2:0] is <binarynumber>0b100</binarynumber>, then the System PMU has affinity with the up-to 8 PEs that have <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7:3] == SPMDEVAFF_EL1.Aff1[7:3].</content>
</listitem></list>

      </purpose_text>
      <purpose_text>
        <para>Depending on the <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> nature of the system, it might be possible that SPMDEVAFF_EL1 is read before system firmware has configured the System PMU and/or the PE or group of PEs that the System PMU has affinity with. When this is the case, SPMDEVAFF_EL1 reads-as-zero.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>Unknown</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>SPMDEVAFF_EL1 is a 64-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="64">
  <text_before_fields/>
  <field id="fieldset_0-63_40" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>63</field_msb>
    <field_lsb>40</field_lsb>
    <rel_range>63:40</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-39_32" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>Aff3</field_name>
    <field_msb>39</field_msb>
    <field_lsb>32</field_lsb>
    <rel_range>39:32</rel_range>
    <field_description order="before">
      <para>PE affinity level 3. The <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff3 field, viewed from the highest Exception level of the associated PE or PEs.</para>
    </field_description>
    <field_description order="after">
      <para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para>
    </field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-31_31" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>F0V</field_name>
    <field_msb>31</field_msb>
    <field_lsb>31</field_lsb>
    <rel_range>31</rel_range>
    <field_description order="before">
      <para>Indicates that the SPMDEVAFF_EL1.Aff0 field is valid.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0 is not valid, and the PE affinity is above level 0 or a subset of level 0.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0 is valid, and the PE affinity is at level 0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-30_30-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="UNKNOWN">
    <field_name>U</field_name>
    <field_msb>30</field_msb>
    <field_lsb>30</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Uniprocessor. The <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.U field, viewed from the highest Exception level of the associated PE.</para>
    </field_description>
    <field_description order="after">
      <para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para>
    </field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When SPMDEVAFF_EL1.F0V == '1'</fields_condition>
  </field>
  <field id="fieldset_0-30_30-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="UNKNOWN">
    <field_msb>30</field_msb>
    <field_lsb>30</field_lsb>
    <rel_range>30</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>UNKNOWN</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-29_25" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>29</field_msb>
    <field_lsb>25</field_lsb>
    <rel_range>29:25</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-24_24-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="UNKNOWN">
    <field_name>MT</field_name>
    <field_msb>24</field_msb>
    <field_lsb>24</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Multithreaded. The <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.MT field, viewed from the highest Exception level of the associated PE.</para>
    </field_description>
    <field_description order="after">
      <para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para>
    </field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When SPMDEVAFF_EL1.F0V == '1'</fields_condition>
  </field>
  <field id="fieldset_0-24_24-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="UNKNOWN">
    <field_msb>24</field_msb>
    <field_lsb>24</field_lsb>
    <rel_range>24</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>UNKNOWN</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-23_16-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff2</field_name>
    <field_msb>23</field_msb>
    <field_lsb>16</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 2. The <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2 field, viewed from the highest Exception level of the associated PE or PEs.</para>
    </field_description>
    <field_description order="after">
      <para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para>
    </field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When affine with a PE or PEs at affinity level 2 or below</fields_condition>
  </field>
  <field id="fieldset_0-23_16-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff2</field_name>
    <field_msb>23</field_msb>
    <field_lsb>16</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 2. Defines part of the <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2 field, viewed from the highest Exception level of the associated PEs.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0bxxxxxxx1</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff2[7:1] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2[7:1], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxxxx10</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff2[7:2] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2[7:2], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxxx100</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff2[7:3] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2[7:3], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxx1000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff2[7:4] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2[7:4], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxx10000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff2[7:5] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2[7:5], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxx100000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff2[7:6] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2[7:6], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bx1000000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff2[7] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff2[7], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When affine with a sub-set of PEs at affinity level 2</fields_condition>
  </field>
  <field id="fieldset_0-23_16-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff2</field_name>
    <field_msb>23</field_msb>
    <field_lsb>16</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level NOT DEFINED. Indicates whether the PE affinity is at level 3.</para>
    </field_description>
    <field_description order="after">
      <para>All other values are reserved.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0x80</field_value>
        <field_value_description>
          <para>PE affinity is at level 3.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-15_8-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff1</field_name>
    <field_msb>15</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 1. The <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1 field, viewed from the highest Exception level of the associated PE or PEs.</para>
    </field_description>
    <field_description order="after">
      <para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para>
    </field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When affine with a PE or PEs at affinity level 1 or below</fields_condition>
  </field>
  <field id="fieldset_0-15_8-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff1</field_name>
    <field_msb>15</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 1. Defines part of the <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1 field, viewed from the highest Exception level of the associated PEs.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0bxxxxxxx1</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff1[7:1] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7:1], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxxxx10</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff1[7:2] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7:2], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxxx100</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff1[7:3] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7:3], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxx1000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff1[7:4] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7:4], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxx10000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff1[7:5] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7:5], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxx100000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff1[7:6] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7:6], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bx1000000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff1[7] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff1[7], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When affine with a sub-set of PEs at affinity level 1</fields_condition>
  </field>
  <field id="fieldset_0-15_8-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff1</field_name>
    <field_msb>15</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 1. Indicates whether the PE affinity is at level 2.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0x00</field_value>
        <field_value_description>
          <para>PE affinity is above level 2 or a subset of level 2.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0x80</field_value>
        <field_value_description>
          <para>PE affinity is at level 2.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-7_0-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff0</field_name>
    <field_msb>7</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 0. The <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0 field, viewed from the highest Exception level of the associated PE.</para>
    </field_description>
    <field_description order="after">
      <para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para>
    </field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When affine with a PE at affinity level 0</fields_condition>
  </field>
  <field id="fieldset_0-7_0-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff0</field_name>
    <field_msb>7</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 0. Defines part of the <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0 field, viewed from the highest Exception level of the associated PEs.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0bxxxxxxx1</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0[7:1] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0[7:1], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxxxx10</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0[7:2] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0[7:2], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxxx100</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0[7:3] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0[7:3], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxxx1000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0[7:4] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0[7:4], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxxx10000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0[7:5] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0[7:5], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bxx100000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0[7:6] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0[7:6], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0bx1000000</field_value>
        <field_value_description>
          <para>SPMDEVAFF_EL1.Aff0[7] is the value of <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.Aff0[7], viewed from the highest Exception level of the associated PEs.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When affine with a sub-set of PEs at affinity level 0</fields_condition>
  </field>
  <field id="fieldset_0-7_0-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>Aff0</field_name>
    <field_msb>7</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>7:0</rel_range>
    <field_description order="before">
      <para>PE affinity level 0. Indicates whether the PE affinity is at level 1.</para>
    </field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0x00</field_value>
        <field_value_description>
          <para>PE affinity is above level 1 or a subset of level 1.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0x80</field_value>
        <field_value_description>
          <para>PE affinity is at level 1.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="64">
  <fieldat id="fieldset_0-63_40" msb="63" lsb="40"/>
  <fieldat id="fieldset_0-39_32" msb="39" lsb="32"/>
  <fieldat id="fieldset_0-31_31" msb="31" lsb="31"/>
  <fieldat id="fieldset_0-30_30-1" msb="30" lsb="30"/>
  <fieldat id="fieldset_0-29_25" msb="29" lsb="25"/>
  <fieldat id="fieldset_0-24_24-1" msb="24" lsb="24"/>
  <fieldat id="fieldset_0-23_16-1" msb="23" lsb="16"/>
  <fieldat id="fieldset_0-15_8-1" msb="15" lsb="8"/>
  <fieldat id="fieldset_0-7_0-1" msb="7" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          


  
    
      <access_permission_text>
        <para>Reads of SPMDEVAFF_EL1 are not affected by the value of <register_link state="AArch64" id="AArch64-vmpidr_el2.xml">VMPIDR_EL2</register_link> at any Exception level.</para>

      </access_permission_text>
      <access_permission_text>
        <para>If System PMU &lt;s&gt; has affinity only with this PE, then it is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether SPMDEVAFF_EL1 reads-as-zero or reads the same value as <register_link state="AArch64" id="AArch64-mpidr_el1.xml">MPIDR_EL1</register_link>.</para>

      </access_permission_text>
      <access_permission_text>
        <para>To access SPMDEVAFF_EL1 for System PMU &lt;s&gt;, set <register_link state="AArch64" id="AArch64-spmselr_el0.xml">SPMSELR_EL0</register_link>.SYSPMUSEL to s.</para>

      </access_permission_text>
      <access_permission_text>
        <para>SPMDEVAFF_EL1 reads-as-zero if any of the following are true:</para>

      </access_permission_text>
      <access_permission_text>
        <list type="unordered">
<listitem><content>System PMU &lt;s&gt; is not implemented.</content>
</listitem><listitem><content>System PMU &lt;s&gt; has no affinity with the PE or cluster of PEs.</content>
</listitem></list>
      </access_permission_text>





    
        
        <access_mechanism accessor="MRS SPMDEVAFF_EL1" type="SystemAccessor">
            <encoding>
            <access_instruction>MRS &lt;Xt&gt;, SPMDEVAFF_EL1</access_instruction>
                
                <enc n="op0" v="0b10"/>
                
                <enc n="op1" v="0b000"/>
                
                <enc n="CRn" v="0b1001"/>
                
                <enc n="CRm" v="0b1101"/>
                
                <enc n="op2" v="0b110"/>
            </encoding>
            <access_permission>
                <ps name="MRS" sections="1" secttype="access_permission">
                <pstext>
if !(IsFeatureImplemented(FEAT_SPMU) &amp;&amp; IsFeatureImplemented(FEAT_AA64)) then
    Undefined();
elsif PSTATE.EL == EL0 then
    Undefined();
elsif PSTATE.EL == EL1 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; MDCR_EL3().EnPM2 == '0' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; SPMACCESSR_EL3()[UInt(SPMSELR_EL0().SYSPMUSEL) * 2+:2] == '00' then
        Undefined();
    elsif EL2Enabled() &amp;&amp; IsFeatureImplemented(FEAT_FGT2) &amp;&amp; ((HaveEL(EL3) &amp;&amp; SCR_EL3().FGTEn2 == '0') || HDFGRTR2_EL2().nSPMDEVAFF_EL1 == '0') then
        AArch64_SystemAccessTrap(EL2, 0x18);
    elsif EL2Enabled() &amp;&amp; MDCR_EL2().EnSPM == '0' then
        AArch64_SystemAccessTrap(EL2, 0x18);
    elsif EL2Enabled() &amp;&amp; SPMACCESSR_EL2()[UInt(SPMSELR_EL0().SYSPMUSEL) * 2+:2] == '00' then
        AArch64_SystemAccessTrap(EL2, 0x18);
    elsif HaveEL(EL3) &amp;&amp; MDCR_EL3().EnPM2 == '0' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    elsif HaveEL(EL3) &amp;&amp; SPMACCESSR_EL3()[UInt(SPMSELR_EL0().SYSPMUSEL) * 2+:2] == '00' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        X{64}(t) = SPMDEVAFF_EL1(UInt(SPMSELR_EL0().SYSPMUSEL));
    end;
elsif PSTATE.EL == EL2 then
    if HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; MDCR_EL3().EnPM2 == '0' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; EL3SDDUndefPriority() &amp;&amp; SPMACCESSR_EL3()[UInt(SPMSELR_EL0().SYSPMUSEL) * 2+:2] == '00' then
        Undefined();
    elsif HaveEL(EL3) &amp;&amp; MDCR_EL3().EnPM2 == '0' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    elsif HaveEL(EL3) &amp;&amp; SPMACCESSR_EL3()[UInt(SPMSELR_EL0().SYSPMUSEL) * 2+:2] == '00' then
        if EL3SDDUndef() then
            Undefined();
        else
            AArch64_SystemAccessTrap(EL3, 0x18);
        end;
    else
        X{64}(t) = SPMDEVAFF_EL1(UInt(SPMSELR_EL0().SYSPMUSEL));
    end;
elsif PSTATE.EL == EL3 then
    X{64}(t) = SPMDEVAFF_EL1(UInt(SPMSELR_EL0().SYSPMUSEL));
end;
                </pstext>
                </ps>
            </access_permission>
        </access_mechanism>

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>