TLBI PAALLOS TLB Invalidate GPT Information by PA, All Entries, Outer Shareable when FEAT_RME is implemented and FEAT_AA64 is implemented Invalidates cached copies of GPT entries from TLBs. Details: The invalidation applies to TLB entries containing GPT information that relates to a physical address. The invalidation applies to all TLB entries containing GPT information. The invalidation affects all TLBs in the Outer Shareable domain. The full set of TLB maintenance instructions that invalidate cached GPT entries is: TLBI PAALL, TLBI PAALLOS, TLBI RPALOS, and TLBI RPAOS. These instructions have the same ordering, observability, and completion behavior as all other TLBI instructions. TLB TLBI PAALLOS is a 64-bit System instruction. The Rt field should be set to 0b11111. If the Rt field is not set to 0b11111, it is CONSTRAINED UNPREDICTABLE whether: The instruction is UNDEFINED. The instruction behaves as if the Rt field is set to 0b11111. This system instruction is an alias of the SYS instruction. TLBI PAALLOS{, <Xt>} if !(IsFeatureImplemented(FEAT_RME) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then Undefined(); elsif PSTATE.EL == EL2 then Undefined(); elsif PSTATE.EL == EL3 then AArch64_TLBI_PAALL(Broadcast_OSH); end; 2026-03-26 20:27:25 2026-03_rel