AMCIDR2 Activity Monitors Component Identification Register 2 It is IMPLEMENTATION DEFINED whether AMCIDR2 is implemented in the Core power domain or in the Debug power domain AMU when FEAT_AMUv1 is implemented, an implementation implements AMCIDR2, and FEAT_AMU_EXT is implemented AMU 0xFF8 When ImpDefBool("AMU CoreSight management registers ignore access controls") RO When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Secure, and AMROOTCR().RA IN {'001', '000'} RAZ/WI When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Realm, and AMROOTCR().RA IN {'010', '000'} RAZ/WI When FEAT_RME is implemented, FEAT_AMU_EXTACR is implemented, an access is Non-secure, and AMROOTCR().RA != '011' RAZ/WI When FEAT_RME is not implemented, FEAT_AMU_EXTACR is implemented, an access is Non-secure, and AMSCR().NSRA == '0' RAZ/WI RO Provides information to identify an activity monitors component. For more information, see 'About the Component identification scheme'. AMU AMCIDR2 is a 32-bit register. 31 8 31:8 Reserved, RES0. PRMBL_2 7 0 7:0 Preamble. Reads as 0x05. RO Accessible at offset 0xFF8 from AMU 2026-03-26 20:27:25 2026-03_rel