CNTV_CTL Counter-timer Virtual Timer Control It is IMPLEMENTATION DEFINED whether CNTV_CTL is implemented in the Core power domain or in the Debug power domain Timer CNTBaseN 0x03C CNTV_CTL RW Timer CNTEL0BaseN 0x03C CNTV_CTL RW Control register for the virtual timer. Timer For more information, see 'Power and reset domains for the system level implementation of the Generic Timer'. CNTV_CTL is a 32-bit register. 31 3 31:3 Reserved, RES0. ISTATUS 2 2 2 The status of the timer. This bit indicates whether the timer condition is met: When the value of the ENABLE bit is 1, ISTATUS indicates whether the timer condition is met. ISTATUS takes no account of the value of the IMASK bit. If the value of ISTATUS is 1 and the value of IMASK is 0, then the timer interrupt is asserted. When the value of the ENABLE bit is 0, the ISTATUS field is UNKNOWN. 0b0 Timer condition is not met. 0b1 Timer condition is met. AU RO IMASK 1 1 1 Timer interrupt mask bit. Permitted values are: For more information, see the description of the ISTATUS bit. 0b0 Timer interrupt is not masked by the IMASK bit. 0b1 Timer interrupt is masked by the IMASK bit. AU ENABLE 0 0 0 Enables the timer. Permitted values are: Setting this bit to 0 disables the timer output signal, but the timer value accessible from CNTV_TVAL continues to count down. Disabling the output signal might be a power-saving option. 0b0 Timer disabled. 0b1 Timer enabled. AU CNTV_CTL can be implemented in any implemented CNTBaseN frame that has virtual timer capability, and in the corresponding CNTEL0BaseN frame. 'CNTCTLBase status and control fields for the CNTBaseN and CNTEL0BaseN frames' describes the status fields that identify whether a CNTBaseN frame is implemented, and for an implemented frame: Whether the CNTBaseN frame has virtual timer capability. Whether the corresponding CNTEL0BaseN frame is implemented. For an implementation that supports the Realm Management Extension, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Root and Realm accesses. For an implementation that recognizes two Security states, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Non-secure accesses. The CNTBaseN frame is always accessible by Secure accesses. For an implemented CNTBaseN frame that has virtual timer capability: CNTV_CTL is accessible in that frame if the value of CNTACR<n>.RWVT is 1. Otherwise, the CNTV_CTL address in that frame is RAZ/WI. For an implemented CNTEL0BaseN frame: CNTV_CTL is accessible in that frame if both: CNTV_CTL is accessible in the corresponding CNTBaseN frame: The value of CNTEL0ACR.EL0VTEN is 1. Otherwise, the CNTV_CTL address in that frame is RAZ/WI. 2026-03-26 20:27:25 2026-03_rel