<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
<!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<!--The data contained in this document is preliminary and subject to change or correction following further review. -->
<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register is_register="True" is_internal="False" is_stub_entry="False">
      <reg_short_name>CNTV_CVAL</reg_short_name>
        
        <reg_long_name>Counter-timer Virtual Timer CompareValue</reg_long_name>

        <power_domain_text>It is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether CNTV_CVAL is implemented in the Core power domain or in the Debug power domain</power_domain_text>


      
      

    
  <reg_address
      external_access="False"
    mem_map_access="True"
      power_domain="None"
      register_startbit="31"
      register_endbit="0"
  >
    <reg_component>Timer</reg_component>
    <reg_frame>CNTBaseN</reg_frame>
    <reg_offset><hexnumber>0x030</hexnumber></reg_offset>
    <reg_instance>CNTV_CVAL</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_type>RW</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>
    
  <reg_address
      external_access="False"
    mem_map_access="True"
      power_domain="None"
      register_startbit="63"
      register_endbit="32"
  >
    <reg_component>Timer</reg_component>
    <reg_frame>CNTBaseN</reg_frame>
    <reg_offset><hexnumber>0x034</hexnumber></reg_offset>
    <reg_instance>CNTV_CVAL</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_type>RW</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>
    
  <reg_address
      external_access="False"
    mem_map_access="True"
      power_domain="None"
      register_startbit="31"
      register_endbit="0"
  >
    <reg_component>Timer</reg_component>
    <reg_frame>CNTEL0BaseN</reg_frame>
    <reg_offset><hexnumber>0x030</hexnumber></reg_offset>
    <reg_instance>CNTV_CVAL</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_type>RW</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>
    
  <reg_address
      external_access="False"
    mem_map_access="True"
      power_domain="None"
      register_startbit="63"
      register_endbit="32"
  >
    <reg_component>Timer</reg_component>
    <reg_frame>CNTEL0BaseN</reg_frame>
    <reg_offset><hexnumber>0x034</hexnumber></reg_offset>
    <reg_instance>CNTV_CVAL</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_type>RW</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>



          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Holds the 64-bit compare value for the virtual timer.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>Timer</reg_group>
      </reg_groups>
      <reg_configuration>
        
    
      <configuration_text>
        <para>For more information, see <xref linkend="#CEGHAIAF">'Power and reset domains for the system level implementation of the Generic Timer'</xref>.</para>
      </configuration_text>

      </reg_configuration>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>CNTV_CVAL is a 64-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="64">
  <text_before_fields/>
  <field id="fieldset_0-63_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>CompareValue</field_name>
    <field_msb>63</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>63:0</rel_range>
    <field_description order="before"><para>Holds the virtual timer CompareValue.</para>
<para>When <register_link state="ext" id="ext-cntv_ctl.xml">CNTV_CTL</register_link>.ENABLE is 1, the timer condition is met when (<register_link state="ext" id="ext-cntvct.xml">CNTVCT</register_link> - CompareValue) is greater than or equal to zero. This means that CompareValue acts like a 64-bit upcounter timer. When the timer condition is met:</para>
<list type="unordered">
<listitem><content><register_link state="ext" id="ext-cntv_ctl.xml">CNTV_CTL</register_link>.ISTATUS is set to 1.</content>
</listitem><listitem><content>An interrupt is generated if <register_link state="ext" id="ext-cntv_ctl.xml">CNTV_CTL</register_link>.IMASK is 0.</content>
</listitem></list>
<para>When <register_link state="ext" id="ext-cntv_ctl.xml">CNTV_CTL</register_link>.ENABLE is 0, the timer condition is not met, but <register_link state="ext" id="ext-cntvct.xml">CNTVCT</register_link> continues to count.</para></field_description>
    <field_resets>
      <field_reset reset_type="Timer">
        <field_reset_standard_text>AU</field_reset_standard_text>
      </field_reset>
    </field_resets>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="64">
  <fieldat id="fieldset_0-63_0" msb="63" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          


  
    
      <access_permission_text>
        <para>CNTV_CVAL can be implemented in any implemented CNTBaseN frame that has virtual timer capability, and in the corresponding CNTEL0BaseN frame.</para>

      </access_permission_text>
      <access_permission_text>
        <para><xref linkend="#CEGDFJAG">'CNTCTLBase status and control fields for the CNTBaseN and CNTEL0BaseN frames'</xref> describes the status fields that identify whether a CNTBaseN frame is implemented, and for an implemented frame:</para>

      </access_permission_text>
      <access_permission_text>
        <list type="unordered">
<listitem><content>Whether the CNTBaseN frame has virtual timer capability.</content>
</listitem><listitem><content>Whether the corresponding CNTEL0BaseN frame is implemented.</content>
</listitem><listitem><content>For an implementation that supports the Realm Management Extension, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Root and Realm accesses.</content>
</listitem><listitem><content>For an implementation that recognizes two Security states, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Non-secure accesses. The CNTBaseN frame is always accessible by Secure accesses.</content>
</listitem></list>

      </access_permission_text>
      <access_permission_text>
        <para>For an implemented CNTBaseN frame that has virtual timer capability:</para>

      </access_permission_text>
      <access_permission_text>
        <list type="unordered">
<listitem><content>CNTV_CVAL is accessible in that frame if the value of <register_link state="ext" id="ext-cntacrn.xml">CNTACR&lt;n&gt;</register_link>.RWVT is 1.</content>
</listitem><listitem><content>Otherwise, the CNTV_CVAL address in that frame is RAZ/WI.</content>
</listitem></list>

      </access_permission_text>
      <access_permission_text>
        <para>For an implemented CNTEL0BaseN frame:</para>

      </access_permission_text>
      <access_permission_text>
        <list type="unordered">
<listitem><content>CNTV_CVAL is accessible in that frame if both:<list type="unordered">
<listitem><content>CNTV_CVAL is accessible in the corresponding CNTBaseN frame:</content>
</listitem><listitem><content>The value of <register_link state="ext" id="ext-cntel0acr.xml">CNTEL0ACR</register_link>.EL0VTEN is 1.</content>
</listitem></list>
</content>
</listitem><listitem><content>Otherwise, the CNTV_CVAL address in that frame is RAZ/WI.</content>
</listitem></list>

      </access_permission_text>
      <access_permission_text>
        <para>If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.</para>
      </access_permission_text>





    
    
    
    

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>