CNTVOFF Counter-timer Virtual Offset It is IMPLEMENTATION DEFINED whether CNTVOFF is implemented in the Core power domain or in the Debug power domain Timer CNTBaseN 0x018 RO Timer CNTBaseN 0x01C RO Holds the 64-bit virtual offset for a CNTBaseN frame that has virtual timer capability. This is the offset between real time and virtual time. Timer For more information, see 'Power and reset domains for the system level implementation of the Generic Timer'. CNTVOFF is a 64-bit register. VOffset Virtual offset 63 0 63:0 Virtual offset. AU CNTVOFF is implemented, as a RO register, in any implemented CNTBaseN frame that has virtual timer capability. 'CNTCTLBase status and control fields for the CNTBaseN and CNTEL0BaseN frames' describes the status fields that identify whether a CNTBaseN frame is implemented, and for an implemented frame: Whether the CNTBaseN frame has virtual timer capability. Whether the corresponding CNTEL0BaseN frame is implemented. For an implementation that supports the Realm Management Extension, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Root and Realm accesses. For an implementation that recognizes two Security states, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Non-secure accesses. The CNTBaseN frame is always accessible by Secure accesses. For an implemented CNTBaseN frame that has virtual timer capability: CNTVOFF is accessible in that frame, as a RO register, if the value of CNTACR<n>.RVOFF is 1. Otherwise, the CNTVOFF address in that frame is RAZ/WI. CNTVOFF is never visible in any CNTEL0BaseN frame. This means that the CNTVOFF address in any implemented CNTEL0BaseN frame is RAZ/WI. In an implementation that supports 64-bit atomic accesses, then the CNTVOFF register must be accessible as an atomic 64-bit value. 2026-03-26 20:27:25 2026-03_rel