<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<!--The data contained in this document is preliminary and subject to change or correction following further review. -->
<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register is_register="True" is_internal="False" is_stub_entry="False">
      <reg_short_name>CTICHINSTATUS</reg_short_name>
        
        <reg_long_name>CTI Channel In Status register</reg_long_name>

        <power_domain_text>CTICHINSTATUS is in the Debug power domain</power_domain_text>


      
      

    
  <reg_address
      external_access="True"
    mem_map_access="True"
      power_domain="None"
  >
    <reg_component>CTI</reg_component>
    <reg_offset><hexnumber>0x138</hexnumber></reg_offset>
    <reg_instance>CTICHINSTATUS</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_type>RO</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>



          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Provides the raw status of the ECT channel inputs to the CTI.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>CTI</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>CTICHINSTATUS is a 32-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="32">
  <text_before_fields/>
  <field id="fieldset_0-31_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>CHIN&lt;n&gt;</field_name>
    <field_msb>31</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>31:0</rel_range>
    <field_description order="before">
      <para>Input channel &lt;n&gt; status.</para>
    </field_description>
    <field_description order="after">
      <para>If the ECT channels do not support multicycle events, then it is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether an input channel can be observed as active.</para>
    </field_description>
    <field_array_indexes index_variable="n" element_size="1" range_specifier="n">
      <field_array_index>
        <field_array_start>31</field_array_start>
        <field_array_end>0</field_array_end>
      </field_array_index>
    </field_array_indexes>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Input channel &lt;n&gt; is inactive.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Input channel &lt;n&gt; is active.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_level>When n &gt;= UInt(CTIDEVID.NUMCHAN)</field_access_level>
        <field_access_type>RAZ/WI</field_access_type>
      </field_access_state>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="32">
  <fieldat id="fieldset_0-31_0" label="CHIN31" msb="31" lsb="31"/>
  <fieldat id="fieldset_0-31_0" label="CHIN30" msb="30" lsb="30"/>
  <fieldat id="fieldset_0-31_0" label="CHIN29" msb="29" lsb="29"/>
  <fieldat id="fieldset_0-31_0" label="CHIN28" msb="28" lsb="28"/>
  <fieldat id="fieldset_0-31_0" label="CHIN27" msb="27" lsb="27"/>
  <fieldat id="fieldset_0-31_0" label="CHIN26" msb="26" lsb="26"/>
  <fieldat id="fieldset_0-31_0" label="CHIN25" msb="25" lsb="25"/>
  <fieldat id="fieldset_0-31_0" label="CHIN24" msb="24" lsb="24"/>
  <fieldat id="fieldset_0-31_0" label="CHIN23" msb="23" lsb="23"/>
  <fieldat id="fieldset_0-31_0" label="CHIN22" msb="22" lsb="22"/>
  <fieldat id="fieldset_0-31_0" label="CHIN21" msb="21" lsb="21"/>
  <fieldat id="fieldset_0-31_0" label="CHIN20" msb="20" lsb="20"/>
  <fieldat id="fieldset_0-31_0" label="CHIN19" msb="19" lsb="19"/>
  <fieldat id="fieldset_0-31_0" label="CHIN18" msb="18" lsb="18"/>
  <fieldat id="fieldset_0-31_0" label="CHIN17" msb="17" lsb="17"/>
  <fieldat id="fieldset_0-31_0" label="CHIN16" msb="16" lsb="16"/>
  <fieldat id="fieldset_0-31_0" label="CHIN15" msb="15" lsb="15"/>
  <fieldat id="fieldset_0-31_0" label="CHIN14" msb="14" lsb="14"/>
  <fieldat id="fieldset_0-31_0" label="CHIN13" msb="13" lsb="13"/>
  <fieldat id="fieldset_0-31_0" label="CHIN12" msb="12" lsb="12"/>
  <fieldat id="fieldset_0-31_0" label="CHIN11" msb="11" lsb="11"/>
  <fieldat id="fieldset_0-31_0" label="CHIN10" msb="10" lsb="10"/>
  <fieldat id="fieldset_0-31_0" label="CHIN9" msb="9" lsb="9"/>
  <fieldat id="fieldset_0-31_0" label="CHIN8" msb="8" lsb="8"/>
  <fieldat id="fieldset_0-31_0" label="CHIN7" msb="7" lsb="7"/>
  <fieldat id="fieldset_0-31_0" label="CHIN6" msb="6" lsb="6"/>
  <fieldat id="fieldset_0-31_0" label="CHIN5" msb="5" lsb="5"/>
  <fieldat id="fieldset_0-31_0" label="CHIN4" msb="4" lsb="4"/>
  <fieldat id="fieldset_0-31_0" label="CHIN3" msb="3" lsb="3"/>
  <fieldat id="fieldset_0-31_0" label="CHIN2" msb="2" lsb="2"/>
  <fieldat id="fieldset_0-31_0" label="CHIN1" msb="1" lsb="1"/>
  <fieldat id="fieldset_0-31_0" label="CHIN0" msb="0" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>