CTILSR CTI Lock Status Register CTILSR is in the Debug power domain CTI 0xFB4 CTILSR RO Indicates the current status of the Software Lock for CTI registers. The optional Software Lock provides a lock to prevent memory-mapped writes to the Cross-Trigger Interface registers. Use of this lock mechanism reduces the risk of accidental damage to the contents of the Cross-Trigger Interface registers. It does not, and cannot, prevent all accidental or malicious damage. CTI If FEAT_Debugv8p4 is implemented, the Software Lock is not implemented. Software uses CTILAR to set or clear the lock, and CTILSR to check the current status of the lock. CTILSR is a 32-bit register. 31 3 31:3 Reserved, RES0. nTT 2 2 2 Not thirty-two bit access required. RAZ. This field has an IMPLEMENTATION DEFINED value. RO SLK 1 1 0 Software Lock status for this component. For an access to LSR that is not a memory-mapped access, or when the Software Lock is not implemented, this field is RES0. For memory-mapped accesses when the Software Lock is implemented, possible values of this field are: 0b0 Lock clear. Writes are permitted to this component's registers. 0b1 Lock set. Writes to this component's registers are ignored, and reads have no side effects. '1' When CTI Software Lock is implemented 1 1 1 Reserved, RAZ. Otherwise SLI 0 0 0 Software Lock implemented. For an access to LSR that is not a memory-mapped access, this field is RAZ. 0b0 Software Lock not implemented or not memory-mapped access. 0b1 Software Lock implemented and memory-mapped access. RO 2026-03-26 20:27:25 2026-03_rel