<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register is_register="True" is_internal="False" is_stub_entry="False">
      <reg_short_name>CTIPIDR3</reg_short_name>
        
        <reg_long_name>CTI Peripheral Identification Register 3</reg_long_name>

        <power_domain_text>CTIPIDR3 is in the Debug power domain</power_domain_text>


      
          <reg_condition otherwise="RES0" verbatim="True"><para>Implementation of this register is <arm-defined-word>OPTIONAL</arm-defined-word>.</para></reg_condition>
      

    
  <reg_address
      external_access="True"
    mem_map_access="True"
      power_domain="None"
  >
    <reg_component>CTI</reg_component>
    <reg_offset><hexnumber>0xFEC</hexnumber></reg_offset>
    <reg_instance>CTIPIDR3</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_type>RO</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>



          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Provides information to identify a CTI component.</para>

      </purpose_text>
      <purpose_text>
        <para>For more information, see <xref linkend="#BABDFHAH">'About the Peripheral identification scheme'</xref>.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>CTI</reg_group>
      </reg_groups>
      <reg_configuration>
        
    
      <configuration_text>
        <para>This register is required for CoreSight compliance.</para>
      </configuration_text>

      </reg_configuration>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>CTIPIDR3 is a 32-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="32">
  <text_before_fields/>
  <field id="fieldset_0-31_8" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>31</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>31:8</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-7_4" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>REVAND</field_name>
    <field_msb>7</field_msb>
    <field_lsb>4</field_lsb>
    <rel_range>7:4</rel_range>
    <field_description order="before"><para>Indicates either the revision of the component, or whether the component has been modified.</para>
<para>Where the component has a single 4-bit revision number, the revision number is an incremental value starting at zero for the first revision of the component.</para>
<para>Where the component has separate major and minor revision numbers, the major and minor revision numbers are each incremental values starting at zero for the first revision of the component.
For each minor revision of the component, the minor revision number increments monotonically.
For each major revision of the component, the major revision number increments monotonically and the minor revision begins again at zero.</para>
<para>For a component with a 12-bit part number with a single 4-bit revision number:</para>
<list type="unordered">
<listitem><content><register_link state="ext" id="ext-ctipidr2.xml">CTIPIDR2</register_link>.REVISION indicates the 4-bit revision number.</content>
</listitem><listitem><content><register_link state="ext" id="ext-ctipidr3.xml">CTIPIDR3</register_link>.REVAND indicates component modifications.</content>
</listitem></list>
<para>For a component with a 12-bit part number with separate major and minor revision numbers:</para>
<list type="unordered">
<listitem><content><register_link state="ext" id="ext-ctipidr2.xml">CTIPIDR2</register_link>.REVISION indicates the 4-bit major revision number.</content>
</listitem><listitem><content><register_link state="ext" id="ext-ctipidr3.xml">CTIPIDR3</register_link>.REVAND indicates the 4-bit minor revision number.</content>
</listitem></list>
<para>For a component with a 16-bit part number:</para>
<list type="unordered">
<listitem><content><register_link state="ext" id="ext-ctipidr2.xml">CTIPIDR2</register_link>.REVISION contains part number bits [3:0].</content>
</listitem><listitem><content><register_link state="ext" id="ext-ctipidr3.xml">CTIPIDR3</register_link>.REVAND indicates the 4-bit revision number.</content>
</listitem></list>
<para>The choice of which style of revision information is used is specific to the designer of the component, and might also be specific to each individual component with a different part number.</para></field_description>
    <field_description order="after"><para>Where REVAND indicates component modifications, this indicates modifications such as errata fixes or metal fixes after implementation.
Usually this value would be zero unless a modification has been performed.
If the field is required for indicating component modifications, Arm recommends that component designers ensure that it can be changed by a metal fix, for example by driving it from registers that reset to zero.</para>
<para><register_link state="ext" id="ext-ctipidr3.xml">CTIPIDR3</register_link>.CMOD might also indicate component modifications.</para>
<para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para></field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-3_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>CMOD</field_name>
    <field_msb>3</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>3:0</rel_range>
    <field_description order="before"><para>Indicates whether the component has been modified from its original behavior.
Examples of modifications include errata fixes or metal fixes after implementation.
Usually this value would be zero unless a modification has been performed.
If the field is required for indicating component modifications, Arm recommends that component designers ensure that it can be changed by a metal fix, for example by driving it from registers that reset to zero.</para>
<para>A value of <binarynumber>0b0000</binarynumber> means the component is not modified from the original design.</para>
<para>Any other value means the component has been modified in an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> way.</para></field_description>
    <field_description order="after"><para>For any two components with the same Unique Component Identifier:</para>
<list type="unordered">
<listitem><content>If the value of the CMOD fields of both components equals zero, the components are identical.</content>
</listitem><listitem><content>If the CMOD fields of both components have the same nonzero value, it does not necessarily mean that they have the same modifications.</content>
</listitem><listitem><content>If the value of the CMOD field of either of the two components is nonzero, they might not be identical, even though they have the same Unique Component Identifier.</content>
</listitem></list>
<para><register_link state="ext" id="ext-ctipidr3.xml">CTIPIDR3</register_link>.REVAND might also indicate component modifications.</para>
<para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para></field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="32">
  <fieldat id="fieldset_0-31_8" msb="31" lsb="8"/>
  <fieldat id="fieldset_0-7_4" msb="7" lsb="4"/>
  <fieldat id="fieldset_0-3_0" msb="3" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>