DBGWVR<n>_EL1 Debug Watchpoint Value Registers DBGWVR<n>_EL1 is in the Core power domain 0 63 Debug 0x800 + (16 * n) DBGWVR<n>_EL1 When DoubleLockStatus(), or !IsCorePowered(), or OSLockStatus(), or !AllowExternalDebugAccess(addrdesc) ERROR When SoftwareLockStatus(addrdesc) RO RW DBGWVR<n>_EL1 Architectural AArch64 63 0 63 0 63 0 63 0 DBGWVR<n> Architectural AArch32 31 0 31 0 31 0 31 0 Holds a data address value for use in watchpoint matching. Forms watchpoint n together with control register DBGWCR<n>_EL1. Debug If watchpoint n is not implemented, then accesses to this register are: When IsCorePowered() && !DoubleLockStatus() && !OSLockStatus() && AllowExternalDebugAccess(), RES0. Otherwise, a CONSTRAINED UNPREDICTABLE choice of RES0 or ERROR. DBGWVR<n>_EL1 is a 64-bit register. RESS[14:8] 63 57 63:57 Reserved, Sign extended. Hardware and software must treat this field as RES0 if the most significant bit of VA is 0 or RES0, and as RES1 if the most significant bit of VA is 1. Hardware always ignores the value of these bits and it is IMPLEMENTATION DEFINED whether: The bits are hardwired to a copy of the most significant bit of VA, meaning writes to these bits are ignored, and reads to the bits always return the hardwired value. The value in those bits can be written, and reads will return the last value written. The value held in those bits is ignored by hardware. VA[56:53] 56 53 3:0 Extension to VA[48:2]. For more information, see VA[48:2]. AU When FEAT_LVA3 is implemented RESS[7:4] 56 53 3:0 Extension to RESS[14:8]. For more information, see RESS[14:8]. Otherwise VA[52:49] 52 49 3:0 Extension to VA[48:2]. For more information, see VA[48:2]. AU When FEAT_LVA is implemented RESS[3:0] 52 49 3:0 Extension to RESS[14:8]. For more information, see RESS[14:8]. Otherwise VA[48:2] 48 2 48:2 Bits[48:2] of the address value for comparison. When FEAT_LVA3 is implemented, (VA[56:53]:VA[52:49]) forms the upper part of the address value. If FEAT_LVA3 is not implemented, bits VA[56:53] are part of the RESS field. When FEAT_LVA is implemented, VA[52:49] forms the upper part of the address value. If FEAT_LVA is not implemented, bits [52:49] are part of the RESS field. Arm deprecates setting DBGWVR<n>_EL1[2] == 1. AU 1 0 1:0 Reserved, RES0. 2026-03-26 20:27:25 2026-03_rel