<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register is_register="True" is_internal="False" is_stub_entry="False">
      <reg_short_name>EDECCR</reg_short_name>
        
        <reg_long_name>External Debug Exception Catch Control Register</reg_long_name>

        <power_domain_text>EDECCR is in the Core power domain</power_domain_text>


      
      

    
  <reg_address
      external_access="True"
    mem_map_access="True"
      power_domain="None"
  >
    <reg_component>Debug</reg_component>
    <reg_offset><hexnumber>0x098</hexnumber></reg_offset>
    <reg_instance>EDECCR</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_level>When DoubleLockStatus(), or !IsCorePowered(), or OSLockStatus()</reg_access_level>
          <reg_access_type>ERROR</reg_access_type>
      </reg_access_state>
        
      <reg_access_state>
          <reg_access_level>When SoftwareLockStatus(addrdesc)</reg_access_level>
          <reg_access_type>RO</reg_access_type>
      </reg_access_state>
        
      <reg_access_state>
          <reg_access_type>RW</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>



          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        



    
      
      <reg_mapping>
        
  

    

  

    <mapped_name filename="AArch64-oseccr_el1.xml">OSECCR_EL1</mapped_name>
  <mapped_type>Architectural</mapped_type>
      <mapped_execution_state>AArch64</mapped_execution_state>
    <mapped_from_startbit>31</mapped_from_startbit>
    <mapped_from_endbit>0</mapped_from_endbit>
    <mapped_to_startbit>31</mapped_to_startbit>
    <mapped_to_endbit>0</mapped_to_endbit>
    <mapped_from_rangeset output="31:0">
      <range>
        <msb>31</msb>
        <lsb>0</lsb>
      </range>
    </mapped_from_rangeset>
    <mapped_to_rangeset output="31:0">
      <range>
        <msb>31</msb>
        <lsb>0</lsb>
      </range>
    </mapped_to_rangeset>

      </reg_mapping>
    
      
      <reg_mapping>
        
  

    

  

    <mapped_name filename="AArch32-dbgoseccr.xml">DBGOSECCR</mapped_name>
  <mapped_type>Architectural</mapped_type>
      <mapped_execution_state>AArch32</mapped_execution_state>
    <mapped_from_startbit>31</mapped_from_startbit>
    <mapped_from_endbit>0</mapped_from_endbit>
    <mapped_to_startbit>31</mapped_to_startbit>
    <mapped_to_endbit>0</mapped_to_endbit>
    <mapped_from_rangeset output="31:0">
      <range>
        <msb>31</msb>
        <lsb>0</lsb>
      </range>
    </mapped_from_rangeset>
    <mapped_to_rangeset output="31:0">
      <range>
        <msb>31</msb>
        <lsb>0</lsb>
      </range>
    </mapped_to_rangeset>

      </reg_mapping>

      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Controls Exception Catch debug events. For more information, see <xref linkend="#exception_catch_debug_event">'Exception Catch debug event'</xref>.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>Debug</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>EDECCR is a 32-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="32">
  <text_before_fields/>
  <field id="fieldset_0-31_23" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>31</field_msb>
    <field_lsb>23</field_lsb>
    <rel_range>31:23</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-22_22-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>RLR2</field_name>
    <field_msb>22</field_msb>
    <field_lsb>22</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Realm EL2 in conjunction with EDECCR.RLE2.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.RLE2 is 0, then Exception Catch debug events are disabled for Realm EL2.</para>
<para>If EDECCR.RLE2 is 1, then Exception Catch debug events are enabled for exception entry and exception return to Realm EL2.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.RLE2 is 0, then Exception Catch debug events are enabled for exception returns to Realm EL2.</para>
<para>If EDECCR.RLE2 is 1, then Exception Catch debug events are enabled for exception entry to Realm EL2.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_RME is implemented</fields_condition>
  </field>
  <field id="fieldset_0-22_22-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>22</field_msb>
    <field_lsb>22</field_lsb>
    <rel_range>22</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-21_21-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>RLR1</field_name>
    <field_msb>21</field_msb>
    <field_lsb>21</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Realm EL1 in conjunction with EDECCR.RLE1.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.RLE1 is 0, then Exception Catch debug events are disabled for Realm EL1.</para>
<para>If EDECCR.RLE1 is 1, then Exception Catch debug events are enabled for exception entry and exception return to Realm EL1.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.RLE1 is 0, then Exception Catch debug events are enabled for exception returns to Realm EL1.</para>
<para>If EDECCR.RLE1 is 1, then Exception Catch debug events are enabled for exception entry to Realm EL1.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_RME is implemented</fields_condition>
  </field>
  <field id="fieldset_0-21_21-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>21</field_msb>
    <field_lsb>21</field_lsb>
    <rel_range>21</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-20_20-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>RLR0</field_name>
    <field_msb>20</field_msb>
    <field_lsb>20</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Realm EL0.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug events are disabled for Realm EL0.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug events are enabled for exception returns to Realm EL0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_RME is implemented</fields_condition>
  </field>
  <field id="fieldset_0-20_20-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>20</field_msb>
    <field_lsb>20</field_lsb>
    <rel_range>20</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-19_19" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>19</field_msb>
    <field_lsb>19</field_lsb>
    <rel_range>19</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-18_18-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>RLE2</field_name>
    <field_msb>18</field_msb>
    <field_lsb>18</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception entry to Realm EL2. Also controls exception catch on exception return to Realm EL2 in conjunction with EDECCR.RLR2.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.RLR2 is 0, then Exception Catch debug events are disabled for Realm EL2.</para>
<para>If EDECCR.RLR2 is 1, then Exception Catch debug events are enabled for exception returns to Realm EL2.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.RLR2 is 0, then Exception Catch debug events are enabled for exception entry and exception return to Realm EL2.</para>
<para>If EDECCR.RLR2 is 1, then Exception Catch debug events are enabled for exception entry to Realm EL2.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_RME is implemented</fields_condition>
  </field>
  <field id="fieldset_0-18_18-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>18</field_msb>
    <field_lsb>18</field_lsb>
    <rel_range>18</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-17_17-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>RLE1</field_name>
    <field_msb>17</field_msb>
    <field_lsb>17</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception entry to Realm EL1. Also controls exception catch on exception return to Realm EL1 in conjunction with EDECCR.RLR1.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.RLR1 is 0, then Exception Catch debug events are disabled for Realm EL1.</para>
<para>If EDECCR.RLR1 is 1, then Exception Catch debug events are enabled for exception returns to Realm EL1.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.RLR1 is 0, then Exception Catch debug events are enabled for exception entry and exception return to Realm EL1.</para>
<para>If EDECCR.RLR1 is 1, then Exception Catch debug events are enabled for exception entry to Realm EL1.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_RME is implemented</fields_condition>
  </field>
  <field id="fieldset_0-17_17-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>17</field_msb>
    <field_lsb>17</field_lsb>
    <rel_range>17</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-16_16" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>RLE0</field_name>
    <field_msb>16</field_msb>
    <field_lsb>16</field_lsb>
    <rel_range>16</rel_range>
    <field_description order="before"/>
    <field_access>
      <field_access_state>
        <field_access_type>
          <arm-defined-word>RES0</arm-defined-word>
        </field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-15_15" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>NSR3</field_name>
    <field_msb>15</field_msb>
    <field_lsb>15</field_lsb>
    <rel_range>15</rel_range>
    <field_description order="before"/>
    <field_access>
      <field_access_state>
        <field_access_type>
          <arm-defined-word>RES0</arm-defined-word>
        </field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-14_14-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>NSR2</field_name>
    <field_msb>14</field_msb>
    <field_lsb>14</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Non-secure EL2 in conjunction with EDECCR.NSE2.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.NSE2 is 0, then Exception Catch debug events are disabled for Non-secure EL2.</para>
<para>If EDECCR.NSE2 is 1, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Non-secure EL2.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.NSE2 is 0, then Exception Catch debug events are enabled for exception returns to Non-secure EL2.</para>
<para>If EDECCR.NSE2 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Non-secure EL2.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Non-secure EL2 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-14_14-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>14</field_msb>
    <field_lsb>14</field_lsb>
    <rel_range>14</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-13_13-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>NSR1</field_name>
    <field_msb>13</field_msb>
    <field_lsb>13</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Non-secure EL1 in conjunction with EDECCR.NSE1.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.NSE1 is 0, then Exception Catch debug events are disabled for Non-secure EL1.</para>
<para>If EDECCR.NSE1 is 1, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Non-secure EL1.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.NSE1 is 0, then Exception Catch debug events are enabled for exception returns to Non-secure EL1.</para>
<para>If EDECCR.NSE1 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Non-secure EL1.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Non-secure EL1 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-13_13-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>13</field_msb>
    <field_lsb>13</field_lsb>
    <rel_range>13</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-12_12-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>NSR0</field_name>
    <field_msb>12</field_msb>
    <field_lsb>12</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Non-secure EL0.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug events are disabled for Non-secure EL0.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug events are enabled for exception returns to Non-secure EL0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Non-secure EL0 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-12_12-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>12</field_msb>
    <field_lsb>12</field_lsb>
    <rel_range>12</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-11_11-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SR3</field_name>
    <field_msb>11</field_msb>
    <field_lsb>11</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to EL3 in conjunction with EDECCR.SE3.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.SE3 is 0, then Exception Catch debug events are disabled for EL3.</para>
<para>If EDECCR.SE3 is 1, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to EL3.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.SE3 is 0, then Exception Catch debug events are enabled for exception returns to EL3.</para>
<para>If EDECCR.SE3 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to EL3.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and EL3 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-11_11-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>11</field_msb>
    <field_lsb>11</field_lsb>
    <rel_range>11</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-10_10-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SR2</field_name>
    <field_msb>10</field_msb>
    <field_lsb>10</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Secure EL2 in conjunction with EDECCR.SE2.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.SE2 is 0, then Exception Catch debug events are disabled for Secure EL2.</para>
<para>If EDECCR.SE2 is 1, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Secure EL2.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.SE2 is 0, then Exception Catch debug events are enabled for exception returns to Secure EL2.</para>
<para>If EDECCR.SE2 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Secure EL2.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and FEAT_SEL2 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-10_10-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>10</field_msb>
    <field_lsb>10</field_lsb>
    <rel_range>10</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-9_9-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SR1</field_name>
    <field_msb>9</field_msb>
    <field_lsb>9</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Secure EL1 in conjunction with EDECCR.SE1.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.SE1 is 0, then Exception Catch debug events are disabled for Secure EL1.</para>
<para>If EDECCR.SE1 is 1, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Secure EL1.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.SE1 is 0, then Exception Catch debug events are enabled for exception returns to Secure EL1.</para>
<para>If EDECCR.SE1 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Secure EL1.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Secure EL1 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-9_9-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>9</field_msb>
    <field_lsb>9</field_lsb>
    <rel_range>9</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-8_8-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SR0</field_name>
    <field_msb>8</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception return to Secure EL0.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug events are disabled for Secure EL0.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug events are enabled for exception returns to Secure EL0.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Secure EL0 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-8_8-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>8</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>8</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-7_7" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>NSE3</field_name>
    <field_msb>7</field_msb>
    <field_lsb>7</field_lsb>
    <rel_range>7</rel_range>
    <field_description order="before"/>
    <field_access>
      <field_access_state>
        <field_access_type>
          <arm-defined-word>RES0</arm-defined-word>
        </field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-6_6-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>NSE2</field_name>
    <field_msb>6</field_msb>
    <field_lsb>6</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception entry to Non-secure EL2. Also controls exception catch on exception return to Non-secure EL2 in conjunction with EDECCR.NSR2.</para>
    </field_description>
    <field_description order="after">
      <note>
        <para>It is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether a reset entry to an Exception level will generate an Exception Catch debug event.</para>
      </note>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.NSR2 is 0, then Exception Catch debug events are disabled for Non-secure EL2.</para>
<para>If EDECCR.NSR2 is 1, then Exception Catch debug events are enabled for exception returns to Non-secure EL2.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.NSR2 is 0, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Non-secure EL2.</para>
<para>If EDECCR.NSR2 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Non-secure EL2.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Non-secure EL2 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-6_6-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>NSE2</field_name>
    <field_msb>6</field_msb>
    <field_lsb>6</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Coarse-grained exception catch for Non-secure EL2. Controls Exception Catch debug events for Non-secure EL2.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug events are disabled for Non-secure EL2.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug events are enabled for Non-secure EL2.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When Non-secure EL2 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-6_6-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>6</field_msb>
    <field_lsb>6</field_lsb>
    <rel_range>6</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-5_5-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>NSE1</field_name>
    <field_msb>5</field_msb>
    <field_lsb>5</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception entry to Non-secure EL1. Also controls exception catch on exception return to Non-secure EL1 in conjunction with EDECCR.NSR1.</para>
    </field_description>
    <field_description order="after">
      <note>
        <para>It is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether a reset entry to an Exception level will generate an Exception Catch debug event.</para>
      </note>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.NSR1 is 0, then Exception Catch debug events are disabled for Non-secure EL1.</para>
<para>If EDECCR.NSR1 is 1, then Exception Catch debug events are enabled for exception returns to Non-secure EL1.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.NSR1 is 0, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Non-secure EL1.</para>
<para>If EDECCR.NSR1 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Non-secure EL1.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Non-secure EL1 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-5_5-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>NSE1</field_name>
    <field_msb>5</field_msb>
    <field_lsb>5</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Coarse-grained exception catch for Non-secure EL1. Controls Exception Catch debug events for Non-secure EL1.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug events are disabled for Non-secure EL1.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug events are enabled for Non-secure EL1.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When Non-secure EL1 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-5_5-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>5</field_msb>
    <field_lsb>5</field_lsb>
    <rel_range>5</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-4_4" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>NSE0</field_name>
    <field_msb>4</field_msb>
    <field_lsb>4</field_lsb>
    <rel_range>4</rel_range>
    <field_description order="before"/>
    <field_access>
      <field_access_state>
        <field_access_type>
          <arm-defined-word>RES0</arm-defined-word>
        </field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-3_3-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SE3</field_name>
    <field_msb>3</field_msb>
    <field_lsb>3</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception entry to EL3. Also controls exception catch on exception return to EL3 in conjunction with EDECCR.SR3.</para>
    </field_description>
    <field_description order="after">
      <note>
        <para>It is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether a reset entry to an Exception level will generate an Exception Catch debug event.</para>
      </note>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.SR3 is 0, then Exception Catch debug events are disabled for EL3.</para>
<para>If EDECCR.SR3 is 1, then Exception Catch debug events are enabled for exception returns to EL3.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.SR3 is 0, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to EL3.</para>
<para>If EDECCR.SR3 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to EL3.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and EL3 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-3_3-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SE3</field_name>
    <field_msb>3</field_msb>
    <field_lsb>3</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Coarse-grained exception catch for EL3. Controls Exception Catch debug events for EL3.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug events are disabled for EL3.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug events are enabled for EL3.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is not implemented and EL3 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-3_3-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>3</field_msb>
    <field_lsb>3</field_lsb>
    <rel_range>3</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-2_2-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SE2</field_name>
    <field_msb>2</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception entry to Secure EL2. Also controls exception catch on exception return to Secure EL2 in conjunction with EDECCR.SR2.</para>
    </field_description>
    <field_description order="after">
      <note>
        <para>It is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether a reset entry to an Exception level will generate an Exception Catch debug event.</para>
      </note>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.SR2 is 0, then Exception Catch debug events are disabled for Secure EL2.</para>
<para>If EDECCR.SR2 is 1, then Exception Catch debug events are enabled for exception returns to Secure EL2.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.SR2 is 0, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Secure EL2.</para>
<para>If EDECCR.SR2 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Secure EL2.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and FEAT_SEL2 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-2_2-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>2</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>2</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-1_1-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SE1</field_name>
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Controls exception catch on exception entry to Secure EL1. Also controls exception catch on exception return to Secure EL1 in conjunction with EDECCR.SR1.</para>
    </field_description>
    <field_description order="after">
      <note>
        <para>It is <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> whether a reset entry to an Exception level will generate an Exception Catch debug event.</para>
      </note>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description><para>If EDECCR.SR1 is 0, then Exception Catch debug events are disabled for Secure EL1.</para>
<para>If EDECCR.SR1 is 1, then Exception Catch debug events are enabled for exception returns to Secure EL1.</para></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description><para>If EDECCR.SR1 is 0, then Exception Catch debug events are enabled for exception entry, reset entry, and exception return to Secure EL1.</para>
<para>If EDECCR.SR1 is 1, then Exception Catch debug events are enabled for exception entry and reset entry to Secure EL1.</para></field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_Debugv8p2 is implemented and Secure EL1 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-1_1-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SE1</field_name>
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Coarse-grained exception catch for Secure EL1. Controls Exception Catch debug events for Secure EL1.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug events are disabled for Secure EL1.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug events are enabled for Secure EL1.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When Secure EL1 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-1_1-3" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>1</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-0_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>SE0</field_name>
    <field_msb>0</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before"/>
    <field_access>
      <field_access_state>
        <field_access_type>
          <arm-defined-word>RES0</arm-defined-word>
        </field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="32">
  <fieldat id="fieldset_0-31_23" msb="31" lsb="23"/>
  <fieldat id="fieldset_0-22_22-1" msb="22" lsb="22"/>
  <fieldat id="fieldset_0-21_21-1" msb="21" lsb="21"/>
  <fieldat id="fieldset_0-20_20-1" msb="20" lsb="20"/>
  <fieldat id="fieldset_0-19_19" msb="19" lsb="19"/>
  <fieldat id="fieldset_0-18_18-1" msb="18" lsb="18"/>
  <fieldat id="fieldset_0-17_17-1" msb="17" lsb="17"/>
  <fieldat id="fieldset_0-16_16" msb="16" lsb="16"/>
  <fieldat id="fieldset_0-15_15" msb="15" lsb="15"/>
  <fieldat id="fieldset_0-14_14-1" msb="14" lsb="14"/>
  <fieldat id="fieldset_0-13_13-1" msb="13" lsb="13"/>
  <fieldat id="fieldset_0-12_12-1" msb="12" lsb="12"/>
  <fieldat id="fieldset_0-11_11-1" msb="11" lsb="11"/>
  <fieldat id="fieldset_0-10_10-1" msb="10" lsb="10"/>
  <fieldat id="fieldset_0-9_9-1" msb="9" lsb="9"/>
  <fieldat id="fieldset_0-8_8-1" msb="8" lsb="8"/>
  <fieldat id="fieldset_0-7_7" msb="7" lsb="7"/>
  <fieldat id="fieldset_0-6_6-1" msb="6" lsb="6"/>
  <fieldat id="fieldset_0-5_5-1" msb="5" lsb="5"/>
  <fieldat id="fieldset_0-4_4" msb="4" lsb="4"/>
  <fieldat id="fieldset_0-3_3-1" msb="3" lsb="3"/>
  <fieldat id="fieldset_0-2_2-1" msb="2" lsb="2"/>
  <fieldat id="fieldset_0-1_1-1" msb="1" lsb="1"/>
  <fieldat id="fieldset_0-0_0" msb="0" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          






    

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>